SPI Slave to PWM Generation

Simple LED Controller

Reference Design LogoPulse width modulation (PWM) uses a rectangular pulse wave whose pulse width is modulated resulting in the variation of the average value of the waveform. Every PWM signal is a continuous succession of high and low pulses. The length of each pulse is defined by the desired duty cycle and frequency.

In mobile phones and other consumer electronic products, the Light Emitting Diode (LED) is increasingly being used as a display backlight. PWM offers an ideal solution for LED controllers as the dimming intensity of the LED can be controlled by changing duty cycle and frequency of the pulse.

This design provides a bridge between a microprocessor and a PWM generator. The SPI slave interface is used to receive command and data from an external SPI master. The command and data in turn are used to set the frequency and duty cycle of the PWM. In this design the Embedded Function Block (EFB) in the MachXO2 device is used to generate the PWM signal.

A typical application of this design includes interfacing a SPI compliant on-board microprocessor and a LED device. This design can also be used as a reference to generate PWM for analog dimming.

Features

  • Programmable frequency varying from 1 KHz to 100 KHz
  • Programmable duty cycle
  • Built-in look up table (LUT) for frequency and duty cycle counter generation
  • Internal oscillator to generate clock signal

Jump to

Block Diagram

Performance and Size

Tested Devices* Language Performance I/O Pins Design Size Revision
MachXO21 Verilog >10 MHz 6 389 LUTs 1.0
iCE40 UltraPlus2 Verilog >10 MHz 5 3023 LUTs 1.0

1. Performance and utilization characteristics are generated using LCMXO2-640HC-4TG100C with Lattice Diamond™ 1.2 design software.
2. Performance and utilization characteristics are generated using iCE40UP UWG30ITR with Lattice Radiant™ 1.0 SP1 design software

* May work in other devices as well.

Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise

Documentation

Technical Resources
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
iCE40 UltraPlus SPI Slave to PWM Generation - Documentation
FPGA-RD-02049 1.0 9/28/2018 PDF 796.5 KB
iCE40 UltraPlus SPI Slave to PWM Generation - Source
1.0 9/28/2018 ZIP 736.7 KB
SPI Slave to PWM Generation - Documentation
RD1107 1.0 4/26/2011 PDF 217.6 KB
SPI Slave to PWM Generation - Source
RD1107 1.0 4/26/2011 ZIP 107 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
IP Module Evaluation Tutorial
8/1/2004 PDF 216.1 KB
ispLeverCORE Evaluation Tutorial
Please read the installation instructions that appear in the applicable IP Core's ReadMe file, or on the Lattice IP website.
8/1/2004 ZIP 444.8 KB


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