The Lattice Semiconductor DSI (Display Serial Interface) transmit reference design is a complete HDL (Hardware Description Language) design for enabling either a MachXO2, MachXO3, or ECP3 FPGA to drive a DSI receiving device. In this design, the DSI transmit accepts RGB (Red, Green & Blue) pixel bus data from a processor or other display control output device. The output of the design interfaces to a D-PHY interface IP core, allowing the FPGA to directly drive a DSI receiving device, such as a display.
The parallel RGB to DSI transmit design illustrates how Lattice Ultra Low Density FPGAs can be used to connect various processors to DSI displays. The DSI transmit design enables embedded designers to utilize low cost screens with embedded processors.
Flexible MIPI (Mobile Industry Processor Interface) DSI Transmit Bridge - Allows an embedded processor that does not have mobile I/O to interface to a low cost DSI screen.
Custom Configuration - Click the start here button below and complete the DSI Tx configuration form. We will send you a HDL netlist for your specific DSI Tx requirements.
Alternatively you can download the default design which interfaces to 24 bit RGB 888 mode DSI screens.