MIPI (Mobile Industry Processor Interface) based application processors (APs) can be used for a multitude of designs outside of the consumer mobile market place because they offer tremendous integration, low power and low cost. However, if an AP needs to interface to an image sensor that is not designed for mobile applications, then conversion bridge logic is required. Image sensors targeting the embedded or digital still camera markets, for example, often have subLVDS or other proprietary interfaces that are not CSI-2 (Camera Serial Interface). The parallel to CSI-2 transmit reference design enables designers to easily implement the bridging function in a Lattice Semiconductor FPGA.
The parallel to CSI-2 transmit design underscores how Lattice Ultra Low Density FPGAs can connect various image sensors to APs or image sensor processors (ISPs).
Flexible MIPI CSI-2 Transmit Bridge - The CSI-2 transmit design enables embedded designers to utilize low cost APs or even ISPs with embedded image sensors.
Custom Configuration - Click the start here button below and complete the CSI-2 Tx configuration form. We will send you a HDL (Hardware Description Language) netlist for your specific CSI-2 Tx requirements.
Alternatively you can download the default design which bridges from a parallel pixel bus to 2 lane RAW 10 bit mode.