MIPI CSI-2 Transmit Bridge

A Complete HDL Reference Design

MIPI (Mobile Industry Processor Interface) based application processors (APs) can be used for a multitude of designs outside of the consumer mobile market place because they offer tremendous integration, low power and low cost. However, if an AP needs to interface to an image sensor that is not designed for mobile applications, then conversion bridge logic is required. Image sensors targeting the embedded or digital still camera markets, for example, often have subLVDS or other proprietary interfaces that are not CSI-2 (Camera Serial Interface). The parallel to CSI-2 transmit reference design enables designers to easily implement the bridging function in a Lattice Semiconductor FPGA.

The parallel to CSI-2 transmit design underscores how Lattice Ultra Low Density FPGAs can connect various image sensors to APs or image sensor processors (ISPs).

Flexible MIPI CSI-2 Transmit Bridge - The CSI-2 transmit design enables embedded designers to utilize low cost APs or even ISPs with embedded image sensors.

MIPI CMOS Diagram

Features

  • Interfaces to MIPI CSI-2 Receiving Devices
  • Supports up to 4 data lanes at up to ~ 900Mbps per lane
  • Typical power for 2 data lane bridge running at 700Mbps is 20mW
  • Typical power for 4 data lane bridge running at 700Mbps is 32mW
  • Unidirectional HS (High Speed) Mode Support
  • Bidirectional LP (Low Power) Mode Support
  • Various pixel bus bit width on the input accepted
  • Support for CSI-2 compatible video formats (RAW, YUV or RGB supported)

Block Diagram

Documentation

Quick Reference Technical Resources Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
MIPI D-PHY Bandwidth Matrix Table User Guide UG110 1.0 6/30/2015 PDF 1.3 MB
MIPI DPHY DSI/CSI-2 Example Schematic 1.0 10/29/2013 PDF 72.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 RGB888 4L RD1183 6.0 8/18/2015 ZIP 682.3 KB
LatticeECP3 RAW 10b 1L RD1183 6.0 8/18/2015 ZIP 701.7 KB
LatticeECP3 RAW10 2L RD1183 6.0 8/18/2015 ZIP 1.6 MB
LatticeECP3 RAW10 4L RD1183 6.0 8/18/2015 ZIP 701.6 KB
LatticeECP3 RAW12 4L RD1183 6.0 8/18/2015 ZIP 738.2 KB
LatticeECP3 RAW14 4L RD1183 6.0 8/18/2015 ZIP 725 KB
LatticeECP3 RAW8 4L RD1183 6.0 8/18/2015 ZIP 1.6 MB
LatticeECP3 RGB565 4L RD1183 6.0 8/18/2015 ZIP 680 KB
LatticeECP3 RGB888 1L RD1183 6.0 8/18/2015 ZIP 717.1 KB
LatticeECP3 RGB888 2L RD1183 6.0 8/18/2015 ZIP 1.6 MB
LatticeECP3 RGB888 4L RD1183 6.0 8/18/2015 ZIP 742.4 KB
LatticeECP3 YUV422 10b 2L RD1183 6.0 8/18/2015 ZIP 1.6 MB
LatticeECP3 YUV422 10b 4L RD1183 6.0 8/18/2015 ZIP 1.6 MB
LatticeECP3 YUV422 8b 2L RD1183 6.0 8/18/2015 ZIP 726.1 KB
LatticeECP3 YUV422 8b 4L RD1183 6.0 8/18/2015 ZIP 1.6 MB
LatticeXP2 RAW10 1L RD1183 6.0 8/18/2015 ZIP 804.4 KB
LatticeXP2 RAW12 2L RD1183 6.0 8/18/2015 ZIP 742.6 KB
LatticeXP2 RGB444 1L RD1183 6.0 8/18/2015 ZIP 610.9 KB
LatticeXP2 RGB888 1L RD1183 6.0 8/18/2015 ZIP 1.6 MB
LatticeXP2 RGB888 2L RD1183 6.0 8/18/2015 ZIP 734.3 KB
MachXO2 RAW10 1L RD1183 6.0 8/18/2015 ZIP 1.5 MB
MachXO2 RAW10 2L RD1183 6.0 8/18/2015 ZIP 634.7 KB
MachXO2 RAW10 4L RD1183 6.0 8/18/2015 ZIP 666 KB
MachXO2 RAW12 1L RD1183 6.0 8/18/2015 ZIP 626.9 KB
MachXO2 RAW12 2L RD1183 6.0 8/18/2015 ZIP 637.1 KB
MachXO2 RAW12 4L RD1183 6.0 8/18/2015 ZIP 678.3 KB
MachXO2 RAW14 1L RD1183 6.0 8/18/2015 ZIP 641.6 KB
MachXO2 RAW14 2L RD1183 6.0 8/18/2015 ZIP 651.9 KB
MachXO2 RAW14 4L RD1183 6.0 8/18/2015 ZIP 1.6 MB
MachXO2 RAW8 1L RD1183 6.0 8/18/2015 ZIP 1.5 MB
MachXO2 RAW8 2L RD1183 6.0 8/18/2015 ZIP 628.7 KB
MachXO2 RAW8 4L RD1183 6.0 8/18/2015 ZIP 643.8 KB
MachXO2 RGB565 1L RD1183 6.0 8/18/2015 ZIP 628.9 KB
MachXO2 RGB565 4L RD1183 6.0 8/18/2015 ZIP 637.3 KB
MachXO2 RGB666 2L RD1183 6.0 8/18/2015 ZIP 655.1 KB
MachXO2 RGB666 4L RD1183 6.0 8/18/2015 ZIP 698 KB
MachXO2 RGB888 1L RD1183 6.0 8/18/2015 ZIP 626.3 KB
MachXO2 RGB888 2L RD1183 6.0 8/18/2015 ZIP 638.6 KB
MachXO2 RGB888 4L RD1183 6.0 8/18/2015 ZIP 676.9 KB
MachXO2 YUV420 8b 4L RD1183 6.0 8/18/2015 ZIP 650.3 KB
MachXO2 YUV422 10b 1L RD1183 6.0 8/18/2015 ZIP 1.5 MB
MachXO2 YUV422 10b 2L RD1183 6.0 8/18/2015 ZIP 638 KB
MachXO2 YUV422 10b 4L RD1183 6.0 8/18/2015 ZIP 666.6 KB
MachXO2 YUV422 8b 1L RD1183 6.0 8/18/2015 ZIP 627.8 KB
MachXO2 YUV422 8b 2L RD1183 6.0 8/18/2015 ZIP 633.5 KB
MachXO2 YUV422 8b 4L RD1183 6.0 8/18/2015 ZIP 665.9 KB
MachXO3 RAW10 1L RD1183 6.0 8/18/2015 ZIP 1.5 MB
MachXO3 RAW10 2L RD1183 6.0 8/18/2015 ZIP 633.9 KB
MachXO3 RAW10 4L RD1183 6.0 8/18/2015 ZIP 660.6 KB
MachXO3 RAW12 1L RD1183 6.0 8/18/2015 ZIP 626.5 KB
MachXO3 RAW12 2L RD1183 6.0 8/18/2015 ZIP 636.8 KB
MachXO3 RAW12 4L RD1183 6.0 8/18/2015 ZIP 661.1 KB
MachXO3 RAW14 1L RD1183 6.0 8/18/2015 ZIP 641.2 KB
MachXO3 RAW14 2L RD1183 6.0 8/18/2015 ZIP 651.6 KB
MachXO3 RAW14 4L RD1183 6.0 8/18/2015 ZIP 1.6 MB
MachXO3 RAW8 1L RD1183 6.0 8/18/2015 ZIP 1.5 MB
MachXO3 RAW8 2L RD1183 6.0 8/18/2015 ZIP 629.4 KB
MachXO3 RAW8 4L RD1183 6.0 8/18/2015 ZIP 661.1 KB
MachXO3 RGB565 4L RD1183 6.0 8/18/2015 ZIP 638 KB
MachXO3 RGB888 1L RD1183 6.0 8/18/2015 ZIP 626.1 KB
MachXO3 RGB888 2L RD1183 6.0 8/18/2015 ZIP 638.1 KB
MachXO3 RGB888 4L RD1183 6.0 8/18/2015 ZIP 660.3 KB
MachXO3 YUV422 10b 4L RD1183 6.0 8/18/2015 ZIP 666.5 KB
MachXO3 YUV422 8b 1L RD1183 6.0 8/18/2015 ZIP 623.7 KB
MachXO3 YUV422 8b 2L RD1183 6.0 8/18/2015 ZIP 633.5 KB
MachXO3 YUV422 8b 4L RD1183 6.0 8/18/2015 ZIP 649.6 KB
MIPI D-PHY Interface IP - Documentation RD1182 1.5 1/31/2015 PDF 3 MB
MIPI D-PHY Interface IP - Source Code RD1182 1.5 1/31/2015 ZIP 4.2 MB
Parallel to MIPI CSI-2 TX Bridge - Documentation RD1183 1.5 1/1/2015 PDF 1.3 MB
Parallel to MIPI CSI-2 TX Bridge - Source Code RD1183 1.5 1/1/2015 ZIP 1.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
MIPI Display Serial Interface Solution Product Flyer Rev. 2 10/22/2013 PDF 1.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Multi-time Programmable ULD FPGAs 1.0 12/1/2013 PDF 163.5 KB


If you need a MIPI configuration which doesn't appear as a reference design on this page, contact your local Lattice Sales Office.