MIPI CSI-2 Transmit Bridge

A Complete HDL Reference Design

MIPI (Mobile Industry Processor Interface) based application processors (APs) can be used for a multitude of designs outside of the consumer mobile market place because they offer tremendous integration, low power and low cost. However, if an AP needs to interface to an image sensor that is not designed for mobile applications, then conversion bridge logic is required. Image sensors targeting the embedded or digital still camera markets, for example, often have subLVDS or other proprietary interfaces that are not CSI-2 (Camera Serial Interface). The parallel to CSI-2 transmit reference design enables designers to easily implement the bridging function in a Lattice Semiconductor FPGA.

The parallel to CSI-2 transmit design underscores how Lattice Ultra Low Density FPGAs can connect various image sensors to APs or image sensor processors (ISPs).

Flexible MIPI CSI-2 Transmit Bridge - The CSI-2 transmit design enables embedded designers to utilize low cost APs or even ISPs with embedded image sensors.

MIPI CMOS Diagram

Features

  • Interfaces to MIPI CSI-2 Receiving Devices
  • Supports up to 4 data lanes at up to ~ 900 Mbps per lane
  • Typical power for 2 data lane bridge running at 700 Mbps is 20 mW
  • Typical power for 4 data lane bridge running at 700 Mbps is 32 mW
  • Unidirectional HS (High Speed) Mode Support
  • Bidirectional LP (Low Power) Mode Support
  • Various pixel bus bit width on the input accepted
  • Support for CSI-2 compatible video formats (RAW, YUV or RGB supported)

Jump to

Block Diagram

Documentation

Quick Reference
Technical Resources
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
MIPI DPHY DSI/CSI-2 Example Schematic
1.0 10/29/2013
TITLE NUMBER VERSION DATE FORMAT SIZE
MIPI D-PHY Interface IP - Source Code
RD1182 1.5 1/31/2015
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD1183 1.5 1/1/2015
Parallel to MIPI CSI-2 TX Bridge - Documentation
RD1183 1.5 1/1/2015
LatticeECP3 RGB565 4L
RD1183 6.0 8/18/2015
LatticeECP3 RAW10 2L
RD1183 6.0 8/18/2015
LatticeECP3 RAW10 4L
RD1183 6.0 8/18/2015
LatticeXP2 RGB888 1L
RD1183 6.0 8/18/2015
MachXO3 YUV422 10b 4L
RD1183 6.0 8/18/2015
LatticeXP2 RGB888 2L
RD1183 6.0 8/18/2015
LatticeXP2 RGB444 1L
RD1183 6.0 8/18/2015
MachXO3 RAW14 1L
RD1183 6.0 8/18/2015
MachXO3 RAW12 1L
RD1183 6.0 8/18/2015
MachXO3 RAW8 2L
RD1183 6.0 8/18/2015
LatticeXP2 RAW10 1L
RD1183 6.0 8/18/2015
MachXO3 RAW8 4L
RD1183 6.0 8/18/2015
MachXO3 RAW10 1L
RD1183 6.0 8/18/2015
MachXO3 YUV422 8b 4L
RD1183 6.0 8/18/2015
ECP5 RGB888 4L
RD1183 6.0 8/18/2015
LatticeECP3 YUV422 8b 2L
RD1183 6.0 8/18/2015
LatticeXP2 RAW12 2L
RD1183 6.0 8/18/2015
LatticeECP3 YUV422 10b 4L
RD1183 6.0 8/18/2015
LatticeECP3 RGB888 4L
RD1183 6.0 8/18/2015
LatticeECP3 RAW 10b 1L
RD1183 6.0 8/18/2015
LatticeECP3 RAW8 4L
RD1183 6.0 8/18/2015
LatticeECP3 RGB888 1L
RD1183 6.0 8/18/2015
LatticeECP3 RGB888 2L
RD1183 6.0 8/18/2015
LatticeECP3 YUV422 8b 4L
RD1183 6.0 8/18/2015
LatticeECP3 RAW14 4L
RD1183 6.0 8/18/2015
MachXO3 RAW14 4L
RD1183 6.0 8/18/2015
MachXO3 RAW12 2L
RD1183 6.0 8/18/2015
LatticeECP3 RAW12 4L
RD1183 6.0 8/18/2015
MachXO3 RAW10 4L
RD1183 6.0 8/18/2015
MachXO3 YUV422 8b 2L
RD1183 6.0 8/18/2015
MachXO3 RGB565 4L
RD1183 6.0 8/18/2015
LatticeECP3 YUV422 10b 2L
RD1183 6.0 8/18/2015
MachXO2 RAW8 1L
RD1183 6.0 8/18/2015
MachXO3 RGB888 2L
RD1183 6.0 8/18/2015
MachXO3 RAW12 4L
RD1183 6.0 8/18/2015
MachXO3 RAW8 1L
RD1183 6.0 8/18/2015
MachXO3 RAW14 2L
RD1183 6.0 8/18/2015
MachXO3 RAW10 2L
RD1183 6.0 8/18/2015
MachXO3 RGB888 1L
RD1183 6.0 8/18/2015
MachXO3 RGB888 4L
RD1183 6.0 8/18/2015
MachXO3 YUV422 8b 1L
RD1183 6.0 8/18/2015
MachXO2 YUV422 8b 1L
RD1183 6.0 8/18/2015
MachXO2 YUV422 10b 2L
RD1183 6.0 8/18/2015
MachXO2 RAW14 4L
RD1183 6.0 8/18/2015
MachXO2 RAW14 2L
RD1183 6.0 8/18/2015
MachXO2 RGB666 4L
RD1183 6.0 8/18/2015
MachXO2 RAW12 1L
RD1183 6.0 8/18/2015
MachXO2 YUV420 8b 4L
RD1183 6.0 8/18/2015
MachXO2 RAW8 2L
RD1183 6.0 8/18/2015
MachXO2 RGB888 1L
RD1183 6.0 8/18/2015
MachXO2 RGB666 2L
RD1183 6.0 8/18/2015
MachXO2 YUV422 8b 2L
RD1183 6.0 8/18/2015
MachXO2 RGB565 1L
RD1183 6.0 8/18/2015
MachXO2 YUV422 10b 1L
RD1183 6.0 8/18/2015
MachXO2 RAW10 1L
RD1183 6.0 8/18/2015
MachXO2 RGB888 4L
RD1183 6.0 8/18/2015
MachXO2 RAW12 4L
RD1183 6.0 8/18/2015
MachXO2 RAW12 2L
RD1183 6.0 8/18/2015
MachXO2 YUV422 10b 4L
RD1183 6.0 8/18/2015
MachXO2 RAW14 1L
RD1183 6.0 8/18/2015
MachXO2 RGB565 4L
RD1183 6.0 8/18/2015
MachXO2 YUV422 8b 4L
RD1183 6.0 8/18/2015
MachXO2 RAW8 4L
RD1183 6.0 8/18/2015
MachXO2 RGB888 2L
RD1183 6.0 8/18/2015
MachXO2 RAW10 4L
RD1183 6.0 8/18/2015
MachXO2 RAW10 2L
RD1183 6.0 8/18/2015
MIPI D-PHY Interface IP - Documentation
FPGA-RD-02040 1.6 5/15/2018
TITLE NUMBER VERSION DATE FORMAT SIZE
MIPI Display Serial Interface Solution Product Flyer
I0241 2.0 10/22/2013
TITLE NUMBER VERSION DATE FORMAT SIZE
Multi-time Programmable ULD FPGAs
1.0 12/1/2013


If you need a MIPI configuration which doesn't appear as a reference design on this page, contact your local Lattice Sales Office.

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