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ID: 3464
Case Type: faq
Category: Simulation
Related To: Synopsys (VCS)
Family: Other FPGA

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Whether STA(Static Timing Analysis) is supported on ispLSI1032 design within PrimeTime\uFF1F

No. STA(Static Timing Analysis) is not supported on ispLSI1032 design within PrimeTime. ispLSI1032 is an old CPLD and the timing on the CPLD is very simple. All paths between the logic blocks will have the same timing.