Lattice Nexus Device Multi-Boot Reference Design

Supports Booting Patterns that Reside in an External SPI Flash Device

Related Applications

This reference design showcases the Multi-Boot mode supported in Nexus devices. The Multi-Boot mode supports booting from up to six patterns that reside in an external SPI flash device, up to three patterns for MachXO5-NX internal flash memory. The patterns include a primary pattern, a golden pattern, and up to four alternate patterns, designated as Alternate Pattern 1 to Alternate Pattern 4.

By using the MULTIBOOT primitive, it allows the device to operate in dynamic mode. It allows the system to dynamically switch to any of the alternate patterns after the device boots up from the primary pattern while still being protected by a golden pattern. This reference design implements the dynamic mode, which allows the system to dynamically switch between two to three bitstream patterns using the MULTIBOOT primitive. By using Multi-Boot mode, you can combine all the bitstream patterns into a single bitstream image and store it in a single external SPI flash device. This solution decreases cost, reduces board space, and simplifies field upgrades. Note that this reference design is developed using the CrossLink™-NX device, but the design can be ported to other Nexus devices.

Features

  • Allows the system to dynamically switch between multiple bitstream pattern using the MULTIBOOT primitive while still being protected with a golden pattern

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Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Nexus Device Multi-Boot Reference Design – Source Code
10/6/2024 ZIP 24.5 MB
Lattice Nexus Device Multi-Boot Reference Design – User Guide
FPGA-RD-02294 0.80 10/6/2024 PDF 1.4 MB

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