MachXO2 I2C Embedded Programming Access Firmware

Inter-Integrated Circuit Interface for Communication Between Devices on the Same Board

Related Products

LatticeReferenceDesign-Logo

The I2C interface (Inter-Integrated Circuit) also known as two-wire interface is a multi-master serial single-ended bus invented by Philips. I2C is widely used for communications between devices on the same board. Every MachXO2 device contains two hardened I2C IP cores designated as "Primary" and "Secondary" I2C cores. The MachXO2 offers the user the ability to employ the primary I2C core and program the MachXO2 Configuration Flash in the offline or transparent modes.

Features

This reference design provides readable and easy to modify C code that can be ported to a microcontroller to perform the following operations using the I2C bus:

  • Program the MachXO2 configuration flash with a JEDEC file
  • Read MachXO2 user code & device registers
  • Read and write pages in User Flash Memory (UFM)
  • Load and update EBR initialization values in UFM

This reference design provides a ready to use RTL code segment that implements intuitive interface between:

  • An external I2C master and the XO2 internal registers (user logic)
  • An external I2C master and memory extension in XO2

Jump to

Block Diagram

The block diagram shows an example of an external microcontroller (in this case the Lattice Mico32TM) programming the XO2 through the I2C bus in a traditional embedded environment. The features of the reference design are attractive in embedded systems where the MachXO2 needs to be programmed in signal limited environments where a separate JTAG interface is not available. The C code provided follows a documented configuration flow that can be a reference for users to roll their own code. Please refer TN1204 (MachXO2 Programming and Configuration Usage Guide) for further information on the configuration of the XO2 through the hardened I2C port.

Alternate Text

Performance and Size

Device Family Tested Devices1 Language fmax I/O Pins Memory Size Required for C Code Architectural Resources Revision
MachXO2™ 2 LCMXO2-1200ZE-3MG132C C >100KHz (I2C) - 16KB EFB 1.0

1 May work in other devices as well.

2 Performance and utilization characteristics generated using the specified test device and Lattice Diamond™ 1.4 software.

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
MachXO2 I2C Embedded Programming Access Firmware User's Guide
FPGA-RD-02091 1.2 1/22/2021 PDF 1.8 MB
MachXO2 I2C Embedded Programming Access Firmware
RD1129 1.1 1/18/2015 ZIP 3.1 MB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.