ECP5 Versa Development Kit

Connectivity Platform with 3G SERDES and DDR3

ECP5 connectivity platform - Enables designers to evaluate key connectivity features of the ECP5 FPGA, including PCI Express, Gigabit Ethernet, DDR3 and generic SERDES performance.

Rapid prototyping of user functions - The features of the ECP5 Versa board can assist engineers with rapid prototyping and testing of their ECP5 designs.

Proof-of-concept demos - Several demos are available for download with the board to speed up development of PCI Express, Gigabit Ethernet, DDR3, soft error correction (SEC) and generic SERDES performance.

Features

  • Half-length PCI Express form-factor : Allows demonstration of PCI Express x1 interconnection
  • Electrical testing of one full-duplex SERDES channel via SMA connections
  • USB-B connection for UART and device programming
  • Two RJ45 interfaces to 10/100/1000 Ethernet to RGMII
  • On-board Boot Flash : 128M Serial SPI Flash
  • DDR3-1866 memory components (64Mb/x16)1
  • Expansion mezzanine interconnection for prototyping
  • 14-segment alpha-numeric display
  • Switches, LEDs and displays for demo purposes
  • Diamond® programming support
  • On-board reference clock sources

1. ECP5 FPGAs support DDR3 memory at data-rates up to 800 Mbps

Diamond Free License - for the ECP5 Versa Development Kit Only

If you currently do not have access to the award-winning Lattice Diamond design software (version 3.5 or later), Lattice would like to offer you a special 1-year license, that enables design for the ECP5UM-45F FPGA used on the ECP5 Versa Board. To request this license, please follow instructions included with your ECP5 Versa Development Kit. Please note that this license is valid for Diamond design software(version 3.5 or later) and can be used only with the ECP5 Versa Development Kit. This is a limited-time offer.

Jump to

Kit Contents

  • ECP5 Versa Development Board
  • USB-A to USB-B (Mini) Cable for FPGA programming via a PC
  • 12V AC/DC power adapter and international plug adapters
  • QuickStart Guide

Board Photos

Top View

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Bottom View

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Side View

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Ordering Information

  • Ordering Part Number: LFE5UM-45F-VERSA-EVN
  • Click here to find an authorized Lattice distributor near you
  • Click here to order now from the Lattice Online Store

Documentation

Quick Reference
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Programming Cable - User Guide
Describes the features and recommended usage guidelines of Lattice ispDOWNLOAD Cables.
FPGA-UG-02042 26.7 4/24/2024 PDF 992.6 KB
LatticeMico32 Tri-Speed Ethernet MAC Gigabit Demo for the ECP5 and ECP5-5G Versa Development Board - User Guide
FPGA-UG-02007 1.1 8/31/2022 PDF 1.4 MB
ECP5 Versa Development Board User Guide
FPGA-EB-02021 2.4 11/29/2021 PDF 11 MB
ECP5, ECP5-5G – PCI Express Demo Verilog Source Code (Basic, Throughput and Scatter-Gather DMA) User Guide
UG106 1.0 10/31/2016 PDF 1 MB
ECP5 Versa Development Kit Quick Start Guide
QS038 Rev 0 8/26/2015 PDF 1.2 MB
SERDES Eye Demonstration for the ECP5 and ECP5-5G Versa Development Board - User Guide
UG93 1.4 8/31/2022 PDF 1016.6 KB
SEU (Single Event Upset) Demo for the ECP5 Versa Development Kit
UG92 1.1 8/26/2015 PDF 951.6 KB
DDR3 Demonstration for the ECP5 and ECP5-5G Versa Development Board - User Guide
FPGA-UG-02138 1.4 10/1/2021 PDF 748.1 KB
PCI Express Demos for the ECP5 and ECP5-5G Versa Development Board User Guide
FPGA-UG-02006 1.5 6/30/2021 PDF 845.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
SOLVING INTELLIGENCE, VISION & CONNECTIVITY CHALLENGES AT THE EDGE WITH ECP5™ FPGAs
WP0010 1.0 12/19/2017 PDF 3.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
PCI Express Demo Design for ECP5 Versa Development Kit
1.0 1/1/0001 EXE 54.4 MB
ECP5 Versa Board - OrCAD Files
1.0 4/6/2015 ZIP 2.9 MB
DDR3 Demo for the ECP5 and ECP5-5G Versa Development Kit
1.2 10/31/2016 ZIP 5.8 MB
LatticeMico32 Tri-Speed Ethernet MAC Demo for the ECP5 and ECP5-5G Versa Evaluation Board
1.0 10/31/2016 EXE 5.8 MB
SERDES Eye Demo for the ECP5 and ECP5-5G Versa Development Kit
1.3 1/31/2017 ZIP 5.4 MB
SEU (Single Event Upset) Demo for the ECP5 Versa Development Kit
1.1 8/26/2015 ZIP 579.3 KB
ECP5 Versa Board - Gerber Files
1.0 4/6/2015 ZIP 874.4 KB
ECP5 Versa Board Rev B – OrCAD Files
1.0 1/1/0001 ZIP 5.7 MB

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Featured Partners

The ECP5 Versa Development Board features key components from many partners. Each of these components was chosen to enhance the performance and reliability of the board. To learn more about how these are integrated into the board design, see the board schematics and BOM which are included in the User's Guide (EB98) linked below on this page. Also, follow the links to learn more about these components.

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