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Topic ID Family Article Type Category Related To
Why I am not able to use Toggle breakpoint in Aldec Active-HDL Lattice Edition II? 2468 All Devices faq Simulation Aldec
I recently started seeing the Warranty Warning shown below whenever I start the... 1847 All Devices faq Licensing ispLEVER
Which license will I need to use with Lattice Diamond for CrossLink device? 5267 CrossLink faq Customer Board Design
For Power Calculator in Lattice Diamond Tool, the Effective Theta-JA with worst case... 5265 MACHXO3 faq Implementation Power Calculator
In soft MIPI DPHY RX of the CrossLink device, Should the clock be placed only on PCLK... 5263 CrossLink faq Lattice IP\/Reference Design
How to use SPI pins and CDONE pin for general purpose I/O (GPIO) in CrossLink? 5224 CrossLink faq
Do we recommend any PCB manufacturers? 4531 iCE40 faq Customer Board Design
How to boot from external SPI PROM if NVCM on the Master Link Board has been programmed? 5096 CrossLink faq Device Programming Configuration/Programming
Is CrossLink compatible with 2B cable for programming and configuration if the... 5076 CrossLink faq Device Programming Cables
How to use Reveal on CrossLink/LIFMD device for debugging the design? 5075 CrossLink faq Debugging Reveal
Would provide schematic symbols for Altium Designer? 4889 MACHXO3 faq Other
How to use Reveal on CrossLink\/LIFMD device for debugging the design? 5228 CrossLink faq Debugging Reveal
Are there any limitations of using 5 V tolerant inputs on the ispMACH4000 device? 3753 ispMACH 4000 faq Architecture IO
What is the SER (Soft Error Rate) in ispMACH4000 devices? Is the SER data for neutron... 3745 ispMACH 4000 faq Reliability and Materials Reliability
What is the difference between "External feedback" and "internal feedback" when... 3740 ispMACH 4000 faq Inquiries Datasheet
What is the output impedance of HCIOT_2 on the iCE40 LP1K device? 3699 iCE40 faq Architecture IO
How to use Dphase(3:0) Dphase_sel, Dphase_lock, Rxpll_lock, Dphase_out, Rclk_out ports... 3571 LatticeECP3 faq Lattice IP/Reference Design 7:1 LVDS Video
While calling the PAR(Place and Route) on remote machine, Why Diamond dispatches job to... 3350 Other FPGA faq
For XO2 programming, what is the difference between "Flash erase, program, verify,... 3336 MachXO2 faq Device Programming Deployment Tool
Are all pins defined as NC really not connected to anything? So, if a breakout was... 2879 MachXO2 faq Architecture IO