Why pay more for less? – Costing 40% less than competing FPGAs, ECP5 provides connectivity to ASICs and ASSPs with improved routing architecture, dual channel SERDES, and enhanced DSP blocks for up to 4x improved multiplier utilization.
Small packages, twice the functional density – ECP5 provides 85K LUTs in 10.0 x 10.0 mm, 0.5 mm pitch package with SERDES. Smart ball depopulation simplifies package integration with existing low cost PCB technology.
30% lower power consumption – Low static and dynamic power with single channel SERDES functions below 0.25 W and quad channel SERDES functions below 0.5 W.