ECP5 / ECP5-5G

Break the rules of power, size and cost in your connectivity and acceleration applications

Why pay more for less? – Costing less than competing FPGAs, ECP5 and ECP5-5G provide connectivity to ASICs and ASSPs with improved routing architecture, dual channel SERDES, and enhanced DSP blocks for up to 4x improved multiplier utilization.

Small packages, twice the functional density – Up to 85K LUTs in 10 x 10 mm, 0.5 mm pitch package with SERDES. Smart ball depopulation simplifies package integration with existing low cost PCB technology.

30% lower power consumption – Low static and dynamic power with single channel SERDES functions below 0.25 W and quad channel SERDES functions below 0.5 W.

Features

  • Up to 3.2 Gbps SERDES rate with ECP5, and up to 5 Gbps with ECP5-5G
  • Up to 4 channels per device in dual channel blocks for higher granularity
  • Enhanced DSP blocks provide 2x resource improvement for symmetrical filters
  • Single event upset (SEU) mitigation support
  • Programmable IO support for LVCMOS 33/25/18/15/12, XGMII, LVTTL, LVDS, Bus-LVDS, 7:1 LVDS, LVPECL and MIPI D-PHY input/output interfaces

Jump to

Family Table

ECP5 and ECP5-5G Device Selection Guide
Device LFE5UM-25
LFE5UM5G-25
LFE5UM-45
LFE5UM5G-45
LFE5UM-85
LFE5UM5G-85
LFE5U-12 LFE5U-25 LFE5U-45 LFE5U-85
LUTs (K) 24 44 84 12 24 44 84
sysMEM Blocks (18 Kbits) 56 108 208 32 56 108 208
Embedded Memory (Kbits) 1008 1944 3744 576 1008 1944 3744
Distributed RAM Bits (Kbits) 194 351 669 97 194 351 669
18 x 18 Multipliers 28 72 156 28 28 72 156
SERDES (Dual/Channel) 1 / 2 2 / 4 2 / 4 0 0 0 0
PLLs/DLLs 2 / 2 4 / 4 4 / 4 2 / 2 2 / 2 4 / 4 4 / 4
0.5 mm Spacing I/O Count / SERDES
  LFE5UM-25
LFE5UM5G-25
LFE5UM-45
LFE5UM5G-45
LFE5UM-85
LFE5UM5G-85
LFE5U-12 LFE5U-25 LFE5U-45 LFE5U-85
285 csfBGA (10 x 10 mm) 118 / 2 118 / 2 118 / 2 118 / 0 118 / 0 118 / 0 118 / 0
0.8 mm Spacing I/O Count / SERDES
  LFE5UM-25
LFE5UM5G-25
LFE5UM-45
LFE5UM5G-45
LFE5UM-85
LFE5UM5G-85
LFE5U-12 LFE5U-25 LFE5U-45 LFE5U-85
256 caBGA (14 x 14 mm) 197 / 0 197 / 0 197 / 0
381 caBGA (17 x 17 mm) 197 / 2 203 / 4 205 / 4 197 / 0 197 / 0 203 / 0 205 / 0
554 caBGA (23 x 23 mm) 245 / 4 259 / 4 245 / 0 259 / 0
756 caBGA (27 x 27 mm) 365 / 4 365 / 0
ECP5 Automotive Device Selection Guide
Device LAE5U-12 LAE5UM-25 LAE5UM-45
LUTs (K) 12 24 44
sysMEM Blocks (18 Kbits) 32 56 108
Embedded Memory (Kbits) 576 1008 1994
Distributed RAM Bits (Kbits) 97 194 351
18 x 18 Multipliers 28 28 72
SERDES (Dual/Channel) 0 1 / 2 2 / 4
PLLs/DLLs 2 / 2 2 / 2 4 / 4
0.8 mm Spacing I/O Count / SERDES
  LAE5U-12 LAE5UM-25 LAE5UM-45
381 caBGA (17 x 17 mm) 197 / 0 197 / 2 203 / 4

Example Solutions

ECP5 FPGAs provide a low cost, low power, small form factor solution for implementing connectivity and video and imaging functionality in high volume applications such as small cells, industrial video cameras and broadband access equipment.

Automotive Infotainment Solution

  • Flexibility driving single or multiple displays for dashboard, instrument cluster displays and rear-seat entertainment applications.
  • High-speed SERDES channels provide video interfaces to Open LDI, LVDS FPD-Link, eDP, PCIe, and GigE.
  • Control peripheral functions and power sequencing of displays using GPIO.

Low Cost Connectivity for Small Cell Wireless Base Stations

  • Flexible interfacing options to digital front end (DFE) including CPRI, ORI and compressed CPRI
  • DFE augment processing for pico cells such as multi-carrier DUC/DDC and CFR
  • Flexible interfacing options to analog front end including LVDS, JESD207, and JESD204B

Low Power Integration for Industrial Video Cameras

  • Direct interfacing capability with single or multiple image sensors (MIPI CSI-2, sub-LVDS, HiSPi, Parallel)
  • High-performance Wide Dynamic Range (WDR) and Image Signal Processing capabilities supported by embedded block RAM (EBR), and embedded DSP blocks
  • Flexible video interfacing options including integrated high-speed SERDES channels, LVDS, PCIe, and GigE

Small Form Factor Solution for Smart SFPs

  • Smart SFP solution with integrated Operation and Maintenance (OAM) for remote control
  • ECP5/ECP5-5G in a 10 x 10 mm package enables small form factor solution for optical modules
  • SERDES and triple speed MAC for low-cost, low-power connectivity

Low-Cost, Low-Power PCIe Side-Band Solution for Microservers

  • Extract control plane data from I2C or SPI onto a high speed link such as PCIe.
  • Implemented with low-power and size overhead PCIe sideband signaling.
  • Leverage low-cost ECP5/ECP5-5G SERDES, SGMII, and PCIe Gen 1 (2.5 Gbps) and Gen 2 (5 Gbps).

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

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Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 LFE5U-45 BGA 256 Schematic Symbol
3/30/2018
ECP5 and ECP5-5G Family Data Sheet
FPGA-DS-02012 2.1 4/30/2019
ECP5 Automotive Family Data Sheet
FPGA-DS-02014 1.1 8/1/2018
ECP5 and ECP5-5G sysCONFIG Usage Guide
FPGA-TN-02039 1.7 3/27/2018
ECP5 and ECP5-5G SERDES/PCS Usage Guide
TN1261 1.1 11/30/2015
ECP5 and ECP5-5G Hardware Checklist
FPGA-TN-02038 1.4 8/17/2017
ECP5 and ECP5-5G PCI Express Soft IP Ease of Use Guidelines
FPGA-TN-02045 1.1 11/20/2019
ECP5 and ECP5-5G Memory Usage Guide
TN1264 1.2 11/30/2015
ECP5 and ECP5-5G sysCLOCK PLL/DLL Design and Usage Guide
TN1263 1.1 11/30/2015
ECP5 and ECP5-5G High-Speed I/O Interface
FPGA-TN-02035 1.2 5/24/2019
ECP5 and ECP5-5G sysDSP Usage Guide
TN1267 1.1 11/30/2015
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.0 3/30/2018
Adding Scalable Power and Thermal Management to ECP5 Using L-ASC10
AN6095 1.0 6/27/2017
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015
Power Consumption and Management for ECP5 Devices
TN1266 1.1 11/30/2015
Soft Error Detection SED Usage Guide
TN1184 1.7 11/30/2015
Advanced Security Encryption Key Programming Guide
TN1215 1.5 1/30/2016
Dual and Mulitple Boot Feature
TN1216 1.6 10/30/2015
ECP5U to ECP5UM caBGA381 Migration
1.0 3/30/2018
ECP5U-85 Pinout
1.0 2/11/2015
ECP5UM5G-25 Pinout
1.0 2/23/2016
ECP5U-45 Pinout
2.0 3/30/2018
ECP5UM5G csfBGA285 Migration
1.0 2/23/2016
ECP5UM5G-85 Pinout
1.0 2/23/2016
ECP5UM5G caBGA381 Migration
1.0 2/23/2016
ECP5U-12 Pinout
1.1 11/7/2017
ECP5U caBGA381 Migration
1.1 2/23/2016
ECP5UM-25 Pinout
1.0 2/11/2015
ECP5U csfBGA285 Migration
1.0 2/11/2015
ECP5UM csfBGA285 Migration
1.0 2/11/2015
ECP5UM caBGA381 Migration
1.0 2/11/2015
ECP5U-25 Pinout
1.1 11/7/2017
ECP5UM5G caBGA554 Migration
1.0 2/23/2016
ECP5U caBGA 256 Migration
2.0 3/30/2018
ECP5UM-45 Pinout
1.0 2/11/2015
ECP5UM-85 Pinout
1.0 2/11/2015
ECP5UM caBGA554 Migration
1.0 2/11/2015
ECP5U caBGA554 Migration
1.0 2/11/2015
ECP5UM5G-45 Pinout
1.0 2/23/2016
ECP5UM to ECP5UM5G caBGA381 Migration
1.0 3/30/2018
ECP5U to ECP5UM csfBGA285 Migration
1.0 3/30/2018
ECP5U to ECP5UM caBGA554 Migration
1.0 3/30/2018
ECP5UM to ECP5UM5G caBGA554 Migration
1.0 3/30/2018
ECP5UM to ECP5UM5G csfBGA285 Migration
1.0 3/30/2018
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.0 6/24/2020
Using TraceID
FPGA-TN-02084 2.0 6/24/2020
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 1.8 6/24/2020
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.1 5/20/2019
ECP5 and ECP5-5G sysIO Usage Guide
FPGA-TN-02032 1.3 1/30/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 and ECP5-5G Family Data Sheet
FPGA-DS-02012 2.1 4/30/2019
ECP5 Automotive Family Data Sheet
FPGA-DS-02014 1.1 8/1/2018
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 and ECP5-5G sysCONFIG Usage Guide
FPGA-TN-02039 1.7 3/27/2018
ECP5 and ECP5-5G SERDES/PCS Usage Guide
TN1261 1.1 11/30/2015
ECP5 and ECP5-5G Hardware Checklist
FPGA-TN-02038 1.4 8/17/2017
ECP5 and ECP5-5G PCI Express Soft IP Ease of Use Guidelines
FPGA-TN-02045 1.1 11/20/2019
ECP5 and ECP5-5G Memory Usage Guide
TN1264 1.2 11/30/2015
ECP5 and ECP5-5G sysCLOCK PLL/DLL Design and Usage Guide
TN1263 1.1 11/30/2015
ECP5 and ECP5-5G High-Speed I/O Interface
FPGA-TN-02035 1.2 5/24/2019
ECP5 and ECP5-5G sysDSP Usage Guide
TN1267 1.1 11/30/2015
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.0 3/30/2018
Programming External SPI Flash through JTAG for ECP5/ECP5-5G
FPGA-TN-02050 1.0 10/17/2017
Adding Scalable Power and Thermal Management to ECP5 Using L-ASC10
AN6095 1.0 6/27/2017
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015
Power Consumption and Management for ECP5 Devices
TN1266 1.1 11/30/2015
Soft Error Detection SED Usage Guide
TN1184 1.7 11/30/2015
Advanced Security Encryption Key Programming Guide
TN1215 1.5 1/30/2016
Dual and Mulitple Boot Feature
TN1216 1.6 10/30/2015
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.0 6/24/2020
Using TraceID
FPGA-TN-02084 2.0 6/24/2020
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 1.8 6/24/2020
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 4.1 5/20/2019
ECP5 and ECP5-5G sysIO Usage Guide
FPGA-TN-02032 1.3 1/30/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5U to ECP5UM caBGA381 Migration
1.0 3/30/2018
ECP5U-85 Pinout
1.0 2/11/2015
ECP5UM5G-25 Pinout
1.0 2/23/2016
ECP5U-45 Pinout
2.0 3/30/2018
ECP5UM5G csfBGA285 Migration
1.0 2/23/2016
ECP5UM5G-85 Pinout
1.0 2/23/2016
ECP5UM5G caBGA381 Migration
1.0 2/23/2016
ECP5U-12 Pinout
1.1 11/7/2017
ECP5U caBGA381 Migration
1.1 2/23/2016
ECP5UM-25 Pinout
1.0 2/11/2015
ECP5U csfBGA285 Migration
1.0 2/11/2015
ECP5UM csfBGA285 Migration
1.0 2/11/2015
ECP5UM caBGA381 Migration
1.0 2/11/2015
ECP5U-25 Pinout
1.1 11/7/2017
ECP5UM5G caBGA554 Migration
1.0 2/23/2016
ECP5U caBGA 256 Migration
2.0 3/30/2018
ECP5UM-45 Pinout
1.0 2/11/2015
ECP5UM-85 Pinout
1.0 2/11/2015
ECP5UM caBGA554 Migration
1.0 2/11/2015
ECP5U caBGA554 Migration
1.0 2/11/2015
ECP5UM5G-45 Pinout
1.0 2/23/2016
ECP5UM to ECP5UM5G caBGA381 Migration
1.0 3/30/2018
ECP5U to ECP5UM csfBGA285 Migration
1.0 3/30/2018
ECP5U to ECP5UM caBGA554 Migration
1.0 3/30/2018
ECP5UM to ECP5UM5G caBGA554 Migration
1.0 3/30/2018
ECP5UM to ECP5UM5G csfBGA285 Migration
1.0 3/30/2018
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 PCI Express Development Board User's Guide
EB91 1.0 7/31/2014
TITLE NUMBER VERSION DATE FORMAT SIZE
Sony Parallel Sub-LVDS-to-Parallel Sensor Bridge User's Guide
RD1122 1.7 1/25/2015
SD Flash Controller Using SD Bus - Documentation
RD1088 1.4 3/12/2014
Sony Parallel sub-LVDS Sensor Bridge - Source Code
RD1122 1.7 1/2/2015
SD Flash Controller Using SD Bus - Source Code
RD1088 1.4 3/12/2014
HDMI/DVI Video Interface Reference Design - Source Code
RD1097 1.5 4/1/2015
I2C (Inter-Integrated Circuit) Slave/Peripheral - Documentation
RD1054 1.6 12/1/2014
HDMI/DVI Video Interface Reference Design
RD1097 1.5 4/1/2015
HiSPi-to-Parallel Sensor Bridge
RD1120 1.3 4/1/2014
I2C Master with WISHBONE Bus Interface - Source Code
RD1046 1.8 2/1/2016
I2C Controller for Serial EEPROMs - Documentation
RD1006 2.6 3/5/2014
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD1005 5.9 1/10/2015
I2C Controller for Serial EEPROMs - Source Code
RD1006 2.7 1/12/2015
I2C Master with WISHBONE Bus Interface - Documentation
RD1046 1.6 1/15/2015
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD1005 5.8 3/6/2014
I2C (Inter-Integrated Circuit) Slave/Peripheral - Source Code
RD1054 1.6 12/12/2014
Advanced SDR SDRAM Controller - Design Documentation
RD1010 4.8 8/20/2014
BSCAN2 - Multiple Boundary Scan Port Linker - Source Code
RD1002 4.6 3/13/2014
Advanced SDR SDRAM Controller - Source Code
RD1010 4.8 9/12/2014
RGMII to GMII Bridge Reference Design
Also download the source code below
RD1022 2.3 11/18/2016
RGMII to GMII Bridge - Source Code
RD1022 2.3 11/18/2016
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 Errata - SED Function with Distributed RAM
PB1384 1.0 4/14/2017
TITLE NUMBER VERSION DATE FORMAT SIZE
Alternate Qualified Foundry Mask Sets for selected ECP5 and Crosslink devices
PCN11A-19 12/12/2019
PCN09A-19 BOM comparison final
2.0 1/8/2020
Standard OPNs for ASEK PCN09A-19
2.0 1/8/2020
PCN09A-19 Consolidation Qual External Changes
1/9/2020
PCN09A-19 ASEK Second Source Qualification for Selected Products
1/9/2020
PCN 02A-16 ECP5/ECP5-5G updates on Diamond v3.7
PCN02A-16 1.0 3/1/2016
PCN04A-17 ECP5 Data Sheet Change
PCN04A-17 1/1/0001
PCN07A-17 ECP5 285-csfBGA MSL5 to MSL3 transition
PCN07A-17 1.1 1/1/0001
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 LFE5U-45 BGA 256 Schematic Symbol
3/30/2018
Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
6.8 7/16/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 and ECP5-5G Product Brochure
I0242 Rev E. 3/19/2018
Product Selector Guide
I0211 26.0 7/9/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
MG284_FE5
Rev C1 4/19/2018
BG381_LAE5
Rev G 5/27/2020
BG381_FE5
Rev F 5/27/2020
BG381_FE5
Rev E 5/27/2020
BG256_XO2
Rev N1 6/12/2020
BG554_FE5
Rev E 6/24/2020
BG756_FE5
Rev F 6/25/2020
BG756_FE5
Rev E 6/25/2020
TITLE NUMBER VERSION DATE FORMAT SIZE
SOLVING INTELLIGENCE, VISION & CONNECTIVITY CHALLENGES AT THE EDGE WITH ECP5™ FPGAs
WP0010 1.0 12/19/2017
Enabling Programmable Connectivity Solutions for Compact, High Volume Applications
1.0 10/21/2014
TITLE NUMBER VERSION DATE FORMAT SIZE
[BSDL] LFE5U-25F CABGA256
1.13 6/22/2018
[BSDL] LFE5U-45F CABGA256
1.13 6/22/2018
[BSDL] LFE5UM85F CABGA381
1.13 12/2/2016
[BSDL] LAE5UM45F CSFBGA285
1.13 12/2/2016
[BSDL] LAE5UM25F CSFBGA285
1.13 12/2/2016
[BSDL] LFE5U25F CABGA381
1.13 12/2/2016
[BSDL] LFE5UM85F CABGA756
1.13 12/2/2016
[BSDL] LFE5U85F CABGA381
1.13 12/2/2016
[BSDL] LAE5UM25F CABGA381
1.13 12/2/2016
[BSDL] LFE5UM25F CSFBGA285
1.13 12/2/2016
[BSDL] LFE5U85F CABGA554
1.13 12/2/2016
[BSDL] LFE5UM45F CABGA381
1.13 12/2/2016
[BSDL] LFE5U45F CABGA554
1.13 12/2/2016
[BSDL] LFE5UM85F CSFBGA285
1.13 12/2/2016
[BSDL] LFE5UM45 FCSFBGA285
1.13 12/2/2016
[BSDL] LFE5U25F CSFBGA285
1.13 12/2/2016
[BSDL] LAE5UM85F CABGA756
1.13 12/2/2016
[BSDL] LFE5U85F CSFBGA285
1.13 12/2/2016
[BSDL] LFE5UM85F CABGA554
1.13 12/2/2016
[BSDL] LFE5U85F CABGA756
1.13 12/2/2016
[BSDL] LFE5U45F CABGA381
1.13 12/2/2016
[BSDL] LAE5UM45F CABGA554
1.13 12/2/2016
[BSDL] LFE5UM25F CABGA381
1.13 12/2/2016
[BSDL] LFE5U45F CSFBGA285
1.13 12/2/2016
[BSDL] LFE5UM45F CABGA554
1.13 12/2/2016
[BSDL] LAE5UM45F CABGA381
1.13 12/2/2016
[BSDL] LFE5U-12F CABGA256
1.13 6/22/2018
TITLE NUMBER VERSION DATE FORMAT SIZE
ECP5 Device Family DELPHI Models
1.0 2/21/2014
TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] ECP5
2.8 8/19/2019 IBS 29.9 MB


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