CrossLink: How to configure the Reference Design MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge for DSI single lane?SupportArticlePagefc49e189-67bb-47db-abad-9138b7b40648FAQ/Support/AnswerDatabase/5/8/7/5879https://edge.sitecorecloud.io/latticesemi9e32-latticesemi06bb-prod9ecc-d341/media/Project/Lattice/LatticeSemi/Images/SearchThumbnails/FAQ.png?sc_lang=enPlease refer to FPGA-RD-02060 Section 3, Design and Module Description. On the project file, modify the rx_dphy which is declared under rx/rx.sbx. On the Receiver section of the IP, modify the RX Interface to DSI and the Number of RX Lanes to one.
