MachXO3/XO5: What is the IO state for configuration pins when MachXO3 device entered offline programming mode?SupportArticlePage06f63389-3d14-4d6f-88a3-33749840ff5dFAQ/Support/AnswerDatabase/7/0/9/7095https://edge.sitecorecloud.io/latticesemi9e32-latticesemi06bb-prod9ecc-d341/media/Project/Lattice/LatticeSemi/Images/SearchThumbnails/FAQ.png?sc_lang=enOffline programming mode involves erasing the content of the SRAM which makes the device returns to hardware default mode where the I/O state return to its default configuration which is tri-stated with weak pull-down to GND (some pins such as PROGRAMN and JTAG pins have weak pull-up to VCCIO as the default functionality).
