LatticeSC Communications Evaluation Board

The LatticeSC Communications Board provides a stable yet flexible platform designed to help the user quickly evaluate the performance of the LatticeSC/M FPGA or aid in development of custom designs. For more evaluation board options, see the LatticeSC PCI Express x1 Evaluation Board or LatticeSC PCI Express x8 Evaluation Board.

Device Support

You will need the following software to use this board:

  • ispLEVER for design, fitting, place & route of Lattice programmable devices
  • PAC-Designer for design and configuration of ispClock device
  • ispVM to download your program to the LatticeSC or on-board Flash memory devices, and ispClock device

Jump to

Kit Contents

  • LatticeSC Communications Board featuring
    • LFSCM3GA25E-6F900C FPGA Device
    • 300-pin MSA transponder interconnection to evaluation Single Data Rate (SDR) performance for SFI-4.1/XSBI applications
    • Molex VHDM interconnection to system packet interface level 4-phase 2 (SPI-4.2)
    • 200-pin SODIMM socket supporting 64-bit 200-pin DDR-2
      SDRAM
    • SMA test points for high-speed SERDES and Clock I/O
    • On-board power connections and power sources
    • On-board interchangable clock oscillator
    • On-board reference clock management using Lattice ispClock™ devices
    • Various high-speed layout structures
    • On-board Flash configuration memory
    • Various LEDs, switches, connectors, headers, SMA connections for external clocking, and on-board power control
  • ispDOWNLOAD cable for device programming
  • Power Supply

Board Photos

LatticeSC Communications Evaluation Board Top View

Top View

Click image to enlarge

Ordering Information

  • This product is no longer available for sale.

  • The information on this page is for reference purposes only.
  • Contact your local Lattice sales representative for further information.

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
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Programming Cable - User Guide
Describes the features and recommended usage guidelines of Lattice ispDOWNLOAD Cables. 		FPGA-UG-02042 26.7 4/24/2024 PDF 992.6 KB
LatticeSC Communications Platform Evaluation Board: LFSC25E-H-EV User's Guide
Describes the features and functions of the LatticeSC Communications Board, including schematics. 		4/1/2007 PDF 2.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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PCN14A-10 Notification of Coplanarity and height specification changes for the 1152-ball and 1704-ball organic flip chip BGA for the LatticeSC/SCM families of FPGAs - Japanese Lanauage
PCN14A-10 1 9/7/2010 PDF 462.4 KB
PCN14A-10 Notification of Coplanarity and height specification changes for the 1152-ball and 1704-ball organic flip chip BGA for the LatticeSC/SCM families of FPGAs
PCN14A-10 1 9/7/2010 PDF 339.7 KB
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LatticeMico32 Tutorial
8.0 3/24/2010 PDF 1.5 MB
LatticeMico32 Tutorial for Diamond 2.0.1
2.0.1 10/2/2012 PDF 1.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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LatticeSC SERDES Eye/Backplane Demo Design
The demo has been designed to demonstrate the performance of the LatticeSC flexiPCS SERDES IO at 3.125 Gbps. The .zip includes all the programming & source files. Documentation is also included, with a circuit description. 		5/22/2013 ZIP 1.1 MB

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