MIPI CSI-2 to HDMI Reference Design

A Fully Simulatable Reference Design Built using Lattice IP Cores

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The Lattice CSI-2 to HDMI Reference Design for Lattice Avant™-AT showcases a full video path from a CSI-2 image sensor to HDMI output including sensor image processing in between the interfaces. The reference design uses a CSI-2 image sensor (IMX258) for sensing and Lattice CSI-2 D-PHY Receiver IP, and Lattice Byte-to-Pixel Converter IP to get the pixel data.

The reference design is delivered as a Lattice Radiant™ project which includes a full test environment to perform simulation and the necessary board control logic to run a live demonstration. Both simulation and demonstration systems are built around a core design referred as CSI-2 to HDMI core design in this document. The core design is built using the following Lattice IPs: CSI-2 D-PHY Rx, Byte-to-Pixel Converter, Debayer, Automatic White Balance, and Color Correction Matrix.

Features

  • Full video path from sensor to display
  • Simulation environment including self-checking testbench and visual inspection of input/output frames
  • Demonstratable on a Lattice hardware board
  • Modular design built with Lattice IPs and some additional control logic
  • Customizable by user to support additional resolutions and/or sensors

To learn more about this product design and request the complete source code, click here to contact us.

Block Diagram

MIPI-HDMI Core Design Block Diagram

MIPI CSI-2 to HDMI Reference Design Block Diagram

Documentation

Quick Reference
Technical Resources
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MIPI CSI-2 to HDMI Reference Design - User Guide
FPGA-UG-02206 1.2 1/28/2025 PDF 2.4 MB
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MIPI CSI-2 to HDMI Reference Design - Source Code
1/28/2025 ZIP 178.3 MB

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