Ready to Use Ethernet PortfolioLattice provides customers with low cost and low power programmable solutions that are ready-to-use right out of the box. For Ethernet a full suite of tested and interoperable solutions is available that includes:
| LatticeECP3 | LatticeSC/M |
|---|---|
|
Up to 16 Channels per Device
XAUI and 1000BaseX Jitter Compliant
Complete End to End Solution
Very Low Power
Low Cost FPGA Fabric
|
Up to 32 Channels per Device
Data Rates Up to 3.8 Gbps
Complete End-to-End Solution
Very Low SERDES Power
Extreme Performance FPGA Fabric
|
Lattice provides one of the most comprehensive portfolios of soft and hard Ethernet IP, including serial PCS, MACs, and system side interfaces. By targeting the LatticeECP3, LatticeECP2M and LatticeSC/M platforms, developers will drastically reduce cost, power and footprint over competitive solutions. This table provides a quick guide for our Ethernet IP offerings:
| IP Cores | LatticeECP3 | LatticeSC/M | |
|---|---|---|---|
| Serial PCS |
Soft SGMII and GbE | ![]() |
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| Soft XAUI | ![]() |
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| Hard flexiPCS (GbE, 2.5GbE and XAUI) | ![]() |
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| MACs |
Soft Triple Speed MAC (10/100/1000) | ![]() |
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| Soft 2.5GbE MAC | ![]() |
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| Soft 10GbE MAC | ![]() |
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|
Soft HiGiG™ MAC (contact Lattice Sales) ![]() |
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|
| Hard flexiMAC (1GbE and 10GbE) | ![]() |
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| SPI 4.2 |
Soft SPI4.2 ![]() |
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| Hard SPI4.2 on MACO | ![]() |
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| SFI-5 | SFI-5 | ![]() |
|
| IEEE1588 Synchronous Ethernet | IEEE 1588 | ![]() |
|
| Reference Designs |
RGMII to GMII Bridge | ![]() |
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| XAUI to SPI4.2 Bridge | ![]() |
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| HiGig+ to SPI4.2 Bridge | ![]() |
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| Embedded Processor |
Mico8 | ![]() |
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| Mico32 | ![]() |
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Lattice provides application specific evaluation boards, evaluation Ethernet IP, relevant reference designs and host software and drivers. The following evaluation boards and related demonstration packages allow a potential user to quickly and seamlessly evaluate Lattice Ethernet Solutions portfolio, and to use it as a basis for customer specific Ethernet development.
| Board | Connectors and Capabilities | |
|---|---|---|
| LatticeECP3 | IO Protocol Board | SMAs, RJ-45, SPI4.2, DDR2, DDR3, ADC/DAC |
| Serial Protocol Board | SMAs, PCI Express (x4), DDR2, DDR3 | |
| LatticeECP2M | Advanced Evaluation Board | mico32, RJ-45, SPI4.2, DDR2 SODIMM, ADC/DAC |
| SERDES Evaluation Board | SMAs, PCI Express (x1), SFP, SATA, DDR2 | |
| LatticeSC/M | Communication Board | SMAs, SPI4.2, SFI-5, MSA Transponder, DDR2 SODIMM |
| PCI Express x1 Board | PCI Express x1, SMAs, RJ-45, SFP, QDR2, RLDRAM2, DDR2, SATA | |
| PCI Express x4 Board | PCI Express x4, PCI Express Cable, DDR2, PURESPEED I/O, SMAs |
| LatticeECP3 | LatticeECP3 XAUI Demo |
|---|---|
| LatticeECP3 Serdes Eye Demo | |
| LatticeECP2M | Signal Integrity and BER |
| Ethernet MAC and TCP/IP Stack | |
| LatticeSC/M | Signal Integrity and BER |
Lattice tests all critical components of the Ethernet stack rigorously, and puts a great deal of emphasis on interoperability with proven 3rd party silicon platforms. The following test documentation is available for customer review.
We work closely with our Strategic Partners to provide end-to-end system solutions for our mutual customers. An essential part of this program is to provide key interoperability data for the Ethernet market segment. The following table provides a guide to technical reports that detail the results of the interoperability exercises:
| Lattice Device Family | Ethernet Protocol | Marvell Alaska 88E1111/881112 | Broadcom StrataXGS | PMC Sierra PM3388 |
|---|---|---|---|---|
| LatticeECP3 | 1GbE PMA/PCS | TN1196 (PHY/MAC) | TN1217 (PHY/MAC) | |
| SGMII PMA/PCS | TN1197 (PHY/MAC) | |||
| XAUI PMA/PCS | TN1194 TN1219 (PHY/MAC) |
TN1218 (PHY/MAC) | ||
| LatticeECP2M | 1GbE PMA/PCS | TN1163 | ||
| SGMII PMA/PCS | TN1133 | |||
| LatticeSC/M | 1GbE PMA/PCS | TN1120 | TN1157 | |
| SGMII PMA/PCS | TN1127 | |||
| 2.5GbE PMA/PCS | TN1156 | |||
| XAUI PMA/PCS | TN1128 | TN1155 | ||
| HiGig+ PMA/PCS | TN1154 | |||
| 2.5GbE Soft MAC | TN1164 | |||
| HiGig+ MAC | Download | |||
| SPI4.2 | TN1121 |