Preprocessing and FIFO buffering of raw data from filtered optical receiver
Positional control for optical tunable filter. The CPLD drives a value to a digital to analog converter that adjusts a voltage for tuning the optical filter
DSP, SDRAM, and User Console interfaces
Lattice Advantages
Reduced time to market and flexibility to support changing standards through programmability
Integrated CPLD on chip FIFO
High density logic integration and high logic speeds
© Lattice Semiconductor Corporation 2012
