To support the ever-growing need for high resolution images, Panasonic has introduced a 720P and a full 1080P sensor, the MN34081 and the MN34041. Because the resolution and frame rate of the MN34081 & MN34041 are very sizable, an interface of higher bandwidth and lower noise than a standard CMOS parallel bus is required. Panasonic has chosen a differential high-speed serial interface instead of using a traditional CMOS parallel interface. The MN34041 outputs two serial data streams up to 3 bits wide and each stream has its own clock. The MN34081 outputs two serial data streams with 2 bits for each stream and its own clock. Each signal is sub-LVDS and can operate up to 500Mbps. To interface this sensor to a parallel bus ISP, Lattice has implemented a reference design to convert the MN34041 or MN34081 serial data to a parallel format. One can either use the Lattice MachXO2 or the Lattice XP2™-5 non-volatile FPGA to provide an efficient and cost-effective solution for Panasonic Area sensor-to-parallel bridging.
Panasonic Area Sensor-to-Parallel Interface Bridging Block Diagram
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© Lattice Semiconductor Corporation 2012
