Tri-Speed Ethernet MAC Demo for LatticeXP

Overview

This Tri-Speed Ethernet Media Access Controller (TSMAC) demo shows the capability of the TSMAC IP core to function in a real network environment.  The demo, designed to be simple and easy to use, requires no test equipment, lengthy setup or complex explanation. An application familiar to everyone, and practically synonymous with Ethernet and networking, is surfing the web. This demo uses a web server, entirely contained in a LatticeXP™ FPGA, to demonstrate the TSMAC IP core. This not only demonstrates the TSMAC IP, but also shows the ability to embed a CPU in a Lattice FPGA and have an entire system in a chip.

The demo runs on a LatticeXP Advanced Evaluation Board connected to another host computer (demo PC) on the same network (or via a cross-over cable). The client demo PC will connect to the LatticeXP Advanced Evaluation Board, over a standard 100 Base-T network, using a web browser.

Features

• Real-world 802.3 Ethernet frames received and transmitted
• Accepts Broadcast messages (DEST_MAC = FF:FF:FF:FF:FF:FF)
• Accepts packets addressed to its physical MAC address
• Error counters and statisticsCompliant to IEEE 802.3z standard

Documentation

Tri-Speed Ethernet MAC Demo Technical Note

Demo Package

The demo package is released as a zipped file. Simply download the file and unzip it. The pre-built bitstream is included, and must be loaded into the LatticeXP device. Other Lattice tools that may be needed are ispVM^® System software to download the bitstream, and ispLEVER^® design tools if any changes to the design are to be made

Tri-Speed Ethernet MAC Demo for LatticeXP

For demos on other Lattice hardware platforms, See the LatticeMico32 Tri-Speed Ethernet MAC Demo.

To find out more about this demo or about the Tri-Speed Ethernet Media Access Controller IP Core, please contact your local Lattice Sales Office