Scatter-Gather Direct Memory Access (DMA) Controller

Direct Memory Access (DMA) is a technique for transferring blocks of data between system memory and peripherals without a processor (e.g., system CPU) having to be involved in each transfer. DMA not only offloads a system’s processing elements, but can transfer data at much higher rates than processor reads and writes.

Scatter-Gather DMA augments this technique by providing data transfers from one non-contiguous block of memory to another by means of a series of smaller contiguous-block transfers.  The Lattice Scatter-Gather DMA Controller core implements a configurable, multi-channel, WISHBONE-compliant DMA controller with scatter-gather capability.

Features

• Supports up to 16 physical channels
• Up to 8 sub-channels per physical channel
• Four priority levels using round-robin arbitration (weighted or simple)
• WISHBONE bus widths from 8 to 128 bits
• Simple DMA, split transfers, scatter-gather
• Direct interface to external RAM for packet buffering
• Autonomous and hardware-directed retry
• Supports WISHBONE burst and classic-cycle transfers
• Supports centralized and distributed DMA control architectures

Performance and Resource Utilization

1.Performance and utilization characteristics are generated using LFE3-95E-7FN672CES, with Lattice ispLEVER 8.0 software. When using this IP core in a different density, speed, or grade within the LatticeECP3 family, performance and utilization may vary.

1.Performance and utilization characteristics are generated using LFE2M-35E-6F672C, with Lattice ispLEVER 8.0 software. When using this IP core in a different density, speed, or grade within the LatticeECP2M/S family, performance and utilization may vary.

1.Performance and utilization characteristics are generated using LFE2-35E-6F672C, with Lattice ispLEVER 8.0 software. When using this IP core in a different density, speed, or grade within the LatticeECP2 family, performance and utilization may vary.

1.Performance and utilization characteristics are generated using LFSC3GA25E-6FF1020C, with Lattice ispLEVER 8.0 software. When using this IP core in a different density, speed, or grade within the LatticeSC/M family, performance and utilization may vary.

1.Performance and utilization characteristics are generated using LFXP2-40E-6F672C, with Lattice ispLEVER 8.0 software. When using this IP core in a different density, speed, or grade within the LatticeXP2 family, performance and utilization may vary.

Ordering Information

IP Version: 2.3
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