LatticeMico32 Peripherals

The LatticeMico32™ is a highly configurable 32-bit Harvard architecture with a WISHBONE compatible bus structure.  To accelerate the development of microprocessor systems, several optional WISHBONE compatible peripheral components may be integrated with the LatticeMico32.

WISHBONE Compatible Peripheral Components

• Memory controllers
  • Asynchronous SRAM
  • On-chip Block Memory
  • DDR1 Memory*
  • DDR2 Memory*
  • SPI Flash ROM
• I/O 
  • 32-bit Timer 
  • DMA Controller 
  • GPIO 
  • I2C Master Controller 
  • SPI
  • Tri-Speed Ethernet MAC*
  • UART
  • PCI Target 33MHz*

 * These IP cores require a free limited-time evaluation license or a permanent license purchased from Lattice.

Looking for an 8-bit microcontroller?  Check out the LatticeMico8.