LatticeECP3_Chip_Shot

LatticeECP3

Efficiency and innovation, squeezed into one tiny, affordable package

Ultra efficient performance – Enabling that last piece of functionality in the smallest possible space is critical. That’s why you need the LatticeECP3’s 150 k LUTs

Maximize reliability, minimize cost and power – With SERDES on-chip and power consumption starting below 0.5 W, LatticeECP3 FPGAs let you improve reliability and lower the cost of industrial, telecom or automotive infrastructure equipment

A well-connected FPGA – SERDES with the right protocols. IOs with the right interfaces. Meet all of your system connectivity and expansion needs with LatticeECP3

Features

  • Up to 16 channels at 3.125 Gbps
  • 800 MBps DDR3, 1Gbps LVDS
  • Up to 586 programmable sysIO buffers with support for PCI Express, Ethernet (GbE, XAUI, & SGMII), HDMI, SMPTE, Serial Rapid I/O, CPRI and JESD204A/B and more
  • Up to 150 k LUTs and 6.8 Mbits of SRAM
  • Wide array of packages as small as 10.0 mm x 10.0 mm with power consumption below 0.5 W

Jump to

Family Table

LatticeECP3 Device Selection Guide

Parameters ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
LUTs (K) 17 33 67 92 149
EBR SRAM Blocks 38 72 240 240 372
EBR SRAM (Kbits) 700 1327 4420 4420 6850
Distributed RAM (Kbits) 36 68 145 188 303
18 x 18 Multipliers 24 64 128 128 320
3.2 Gbps SERDES Channels 4 4 12 12 16
PLLs + DLLs 2+2 4+2 10+2 10+2 10+2
DDR Support DDR3 800, DDR2 533, DDR 400
Boot Flash External External External External External
Dual Boot Yes Yes Yes Yes Yes
Bit-stream Encryption Yes Yes Yes Yes Yes
Core Vcc 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
Temp C Yes Yes Yes Yes Yes
Temp I Yes Yes Yes Yes Yes
Temp AEC-Q100 Yes Yes - - -
0.5 mm Spacing I/O Count / SERDES
328-ball csBGA (10 x 10 mm) 116 / 2
1.0 mm Spacing I/O Count / SERDES
256-ball ftBGA (17 x 17 mm) 133 / 4 133 / 4
484-ball fpBGA (23 x 23 mm) 222 / 4 295 / 4 295 / 4 295 / 4
672-ball fpBGA (27 x 27 mm) 310 / 4 380 / 8 380 / 8 380 / 8
1156-ball fpBGA (35 x 35 mm) 490 / 12 490 / 12 586 / 16

LA-LatticeECP3 Device Selection Guide

Parameters LA-ECP3-17 LA-ECP3-35
LUTs (K) 17 33
EBR SRAM (Kbits) 700 1327
EBR SRAM Blocks 38 72
Distributed RAM (Kbits) 36 68
18 x 18 Multipliers 24 64
3.2 Gbps SERDES Channels 4 4
Maximum Available I/O 222 310
PLLs + DLLs 2+2 4+2
0.5 mm Spacing I/O Count / SERDES
328-ball csBGA (10 x 10 mm) 116 / 2
1.0 mm Spacing I/O Count / SERDES
256-ball ftBGA (17 x 17 mm) 133 / 4 133 / 4
484-ball fpBGA (23 x 23 mm) 222 / 4 295 / 4
672-ball fpBGA (27 x 27 mm) 310 / 4

Solutions

With plenty of key building blocks readily available for use in your design, your LatticeECP3 is more than full featured – it’s fully loaded. To help you design as efficiently as possible, Lattice has focused on developing solutions for a wide range of application areas including those described below.

Solve Connectivity Problems at the Network Edge

  • Build low cost bridges between Ethernet and custom or legacy interfaces
  • Quickly bridge ASSPs to protocols common in wireless base stations including CPRI and JESD204
  • Implement network traffic pre-processing that improves performance by off-loading processors
  • Enhance ASSPs used in pico and femto-cells by offloading DSP functions

Implement High Performance Control Plane Solutions For Communications, Industrial, Medical and other Applications

  • Use serial interfaces to provide high performance interfaces with the rest of the system
  • Off-load the control processor by building optimized pre-processing algorithms

Enhance Image/Video Systems With Lightning Fast, Massively Parallel Implementations

  • Use industry leading functions to improve image quality
  • Quickly solve real world problems with proven video analytics
  • Provide interfaces to common video protocols

Build Innovative Automotive Solutions

  • Implement low-cost serial interfaces to transmit image data throughout the automobile
  • Use hardware implementations to efficiently analyze image data
  • Reduce processor workload by offloading display scaling, rotation and combination

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Development Kits & Boards

Our development boards & kits help streamline your design process

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Software

Complete Design Flows, High Ease of Use

Documentation

Quick Reference Technical Resources Information Resources Downloads
  TITLE NUMBER VERSION DATE FORMAT SIZE
LA-LatticeECP3 Automotive Family Data Sheet 1.1 5/8/2014 PDF 9.5 MB
LatticeECP3 EA Family Data Sheet DS1021 2.7EA 4/18/2014 PDF 10.6 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
Advanced Security Encryption Key Programming Guide TN1215 1.3 3/4/2014 PDF 4.6 MB
Dual and Mulitple Boot Feature TN1216 1.5 3/4/2014 PDF 3.9 MB
Electrical Recommendations for Lattice SERDES TN1114 02.9 3/25/2014 PDF 1.8 MB
Electrical Recommendations for Lattice SERDES (Chinese Language Version) TN1114C 02.8 10/12/2012 PDF 2 MB
High-Speed PCB Design Considerations TN1033 06.1 5/2/2011 PDF 795.1 KB
High-Speed PCB Design Considerations (Chinese Language Version) TN1033C 06.1 5/23/2011 PDF 434.6 KB
LatticeECP3 and Broadcom 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability TN1217 1.0 7/26/2010 PDF 1.5 MB
LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability TN1218 1.1 2/13/2012 PDF 3.5 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements TN1149 1.5 10/8/2013 PDF 3.8 MB
LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability TN1219 1.0 7/26/2010 PDF 1.4 MB
LatticeECP3 Hardware Checklist TN1189 2.1 2/13/2012 PDF 530.6 KB
LatticeECP3 High-Speed I/O Interface TN1180 2.3 4/2/2013 PDF 12.3 MB
LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability TN1196 1.1 2/13/2012 PDF 2.9 MB
LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability TN1197 1.1 2/13/2012 PDF 3 MB
LatticeECP3 Marvell XAUI 10 Gbps Physical Layer Interoperability TN1194 1.1 2/13/2012 PDF 2.7 MB
LatticeECP3 Memory Usage Guide TN1179 1.8 4/1/2014 PDF 4.6 MB
LatticeECP3 Power Consumption and Management TN1181 1.1 2/2/2012 PDF 424.1 KB
LatticeECP3 SERDES/PCS Reset Sequence - Source Code TN1176 1.1 2/4/2010 ZIP 5.6 KB
LatticeECP3 SERDES/PCS Usage Guide TN1176 2.8 8/26/2014 PDF 8.6 MB
LatticeECP3 SERDES/PCS Usage Guide (Chinese Language Version) TN1176C 02.4 8/28/2012 PDF 8.7 MB
LatticeECP3 SERDES/PCS Usage Guide (Japanese Language Version) TN1176J 2.4 8/22/2012 PDF 2.7 MB
LatticeECP3 Slave SPI Port User's Guide TN1222 1.7 4/26/2014 PDF 1.9 MB
LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide TN1178 2.6 2/3/2014 PDF 5.1 MB
LatticeECP3 sysCONFIG Usage Guide TN1169 2.9 7/29/2014 PDF 4 MB
LatticeECP3 sysDSP Usage Guide TN1182 1.3 2/13/2012 PDF 5.5 MB
LatticeECP3 sysIO Usage Guide TN1177 2.2 8/19/2013 PDF 2 MB
LatticeECP3 sysIO Usage Guide (Chinese Language Version) TN1177C 02.0 6/26/2012 PDF 3.1 MB
Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3 TN1214 1.1 10/18/2010 PDF 176.4 KB
Parallel Flash Programming and FPGA Configuration AN8077 1.4 9/1/2013 PDF 2.4 MB
Parallel Flash Programming and FPGA Configuration - Source Code AN8077 1.3 1/4/2013 RAR 1.4 MB
Soft Error Detection SED Usage Guide TN1184 1.5 3/3/2014 PDF 1022.5 KB
Solder Reflow Guide for Surface Mount Devices TN1076 3.4 10/28/2014 PDF 488.4 KB
Sub-LVDS Signaling Using Lattice Devices TN1210 1.2 3/4/2014 PDF 695.3 KB
Transmission of High-Speed Serial Signals over Common Cable Media TN1066 01.8 2/13/2012 PDF 840.1 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
ECP3 migration 17to35_256 1.2 4/6/2012 XLS 68 KB
ECP3 migration 17to35_484 1.2 4/6/2012 XLS 62 KB
ECP3 migration 17to70_484 1.2 4/6/2012 XLS 67 KB
ECP3 migration 17to95_484 1.2 4/6/2012 XLS 67 KB
ECP3 migration 35to150_672 1.1 7/9/2009 XLS 87.5 KB
ECP3 migration 35to70_484 1.2 9/10/2012 XLS 85.5 KB
ECP3 migration 35to70_672 1.2 9/10/2012 XLS 96 KB
ECP3 migration 35to95_484 1.2 9/10/2012 XLS 86 KB
ECP3 migration 35to95_672 1.2 9/10/2012 XLS 96.5 KB
ECP3 migration 70to150_1156 1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 70to150_672 1.2 9/10/2012 XLS 97.5 KB
ECP3 migration 70to95_1156 1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 70to95_484 1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 70to95_672 1.1 7/9/2009 XLS 15 KB
ECP3 migration 95to150_1156 1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 95to150_672 1.2 9/10/2012 XLS 97.5 KB
LatticeECP3-150EA Pinout 1.5 4/15/2010 CSV 43.8 KB
LatticeECP3-17EA Pinout 1.6 1/24/2012 CSV 23.9 KB
LatticeECP3-35EA Pinout 1.4 4/15/2010 CSV 29 KB
LatticeECP3-70E Pinout 1.2 7/13/2009 CSV 49.8 KB
LatticeECP3-70EA Pinout 1.3 4/15/2010 CSV 49.1 KB
LatticeECP3-95E Pinout 1.2 7/9/2009 CSV 49.8 KB
LatticeECP3-95EA Pinout 1.2 4/15/2010 CSV 49 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
DDR2 Demo for the LatticeECP3 Serial Protocol Board UG49 5/22/2013 PDF 346 KB
JESD207 IP Core User's Guide IPUG111 1.0 8/27/2013 PDF 2.4 MB
LatticeECP3 AMC Evaluation Board User's Guide EB56 01.1 8/27/2012 PDF 6.6 MB
LatticeECP3 AMC Serial RapidIO 2.1 Demo User's Guide UG39 01.0 11/17/2010 PDF 2.7 MB
LatticeECP3 CPRI Demo Design User's Guide UG26 01.2 5/3/2012 PDF 2.7 MB
LatticeECP3 DDR3 Demo for the LatticeECP3 I/O Protocol Board User's Guide UG38 01.4 6/8/2012 PDF 2.7 MB
LatticeECP3 Eye/Backplane Demo for the LatticeECP3 Serial I/O Protocol Board User's Guide UG24 01.4 3/4/2011 PDF 849.9 KB
LatticeECP3 PCI Express Root Complex Lite x1 Native Demo UG40 1.0 10/29/2010 PDF 263.2 KB
LatticeECP3 Serial Protocol Board - Revision D User's Guide EB44 1.3 7/8/2010 PDF 2.4 MB
LatticeECP3 Video Protocol Board - Revision B User's Guide EB39 1.3 3/2/2010 PDF 2.5 MB
LatticeECP3 XAUI Demo UG23 01.3 6/16/2011 PDF 1.1 MB
PCI IP Core User's Guide IPUG18 9.2 11/8/2010 PDF 4.6 MB
PCIe Sample Demo Debugging and Packet Analysis Guide TN1271 10/13/2013 PDF 3.7 MB
RapidIO 2.x LP-Serial Physical Layer Endpoint IP Core User's Guide IPUG84 01.3 6/28/2011 PDF 2.4 MB
Tri-Rate SDI PHY IP Loopback and Passthrough Sample Designs UG22 1.1 10/30/2009 PDF 222.2 KB
Tri-Rate SMPTE SDI Demo UG21 01.5 12/21/2011 PDF 1.1 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
MDIO (Management Data Input/Output Interface) Peripheral - WISHBONE Compatible RD1074 1.1 4/1/2011 PDF 369 KB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge RD1146 1.3 4/1/2014 ZIP 3.9 MB
MIPI CSI2-to-CMOS Parallel Sensor Bridge - Documentation RD1146 1.3 4/1/2014 PDF 4.2 MB
Parallel to MIPI CSI-2 TX Bridge - Documentation RD1183 1.4 4/2/2014 PDF 1.2 MB
Parallel to MIPI CSI-2 TX Bridge - Source Code RD1183 1.4 4/1/2014 ZIP 891.4 KB
Parallel to MIPI DSI TX Bridge - Documentation RD1184 1.4 4/2/2014 PDF 1.6 MB
Parallel to MIPI DSI TX Bridge - Source Code RD1184 1.4 4/1/2014 ZIP 1.2 MB
PCI Target 32-bit/33MHz RD1008 3.5 8/19/2013 PDF 1.5 MB
PCI/WISHBONE Bridge RD1045 1.3 4/10/2011 PDF 244 KB
RGMII to GMII Bridge - Source Code RD1022 2.2 3/1/2014 ZIP 331.4 KB
RGMII to GMII Bridge Reference Design RD1022 2.2 3/1/2014 PDF 437.1 KB
WISHBONE UART - Documentation RD1042 1.5 3/1/2014 PDF 1.4 MB
WISHBONE UART - Source Code RD1042 1.5 3/1/2014 ZIP 58.5 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
ACN03D-11 Withdrawal of ACN03C-11 ANC03D-11 1 4/1/2011 PDF 796.6 KB
Courtesy Notification of Additional Ejector Pin Sites on Select BGA Packages 5/22/2013 PDF 252.9 KB
PCN 03B13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan PCN03B 1.0 11/14/2014 PDF 49.2 KB
PCN 09A-12 Affected Devices PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families PCN09A-12 1.0 5/14/2012 PDF 160.2 KB
PCN 09A-12 Customer Characterization Report PCN09A-12 1.0 5/14/2012 PDF 551.7 KB
PCN 09A-12 Frequently Asked Questions PCN09A-12 1.0 5/11/2012 PDF 178.9 KB
PCN 09A-12 Material Set Changes PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices PCN03A-13 6/28/2013 PDF 202.5 KB
PCN03A-13 Device Characterization Report PCN03A-13 6/28/2013 PDF 981.3 KB
PCN03A-13 FAQs PCN03A-13 6/28/2013 PDF 458.3 KB
PCN03A-14 Affected Part Number List PCN03A-14 1.0 4/4/2014 XLSX 60 KB
PCN03A-14 Characterization Report PCN03A-14 1.0 4/4/2014 PDF 919.5 KB
PCN03A-14 FAQ PCN03A-14 1.0 4/4/2014 PDF 452.5 KB
PCN03A-14 Material Set Table PCN03A-14 1.0 4/4/2014 XLSX 26.9 KB
PCN03A-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products PCN03A-14 1.0 4/4/2014 PDF 206.7 KB
PCN03B-13 Affected Part Number and Material Sets PCN03B-13 6/28/2013 XLSX 69 KB
PCN05A-11 Notification of Intent to Utilize an Alternate Foundry Process for LatticeECP3 PCN05A-11 1.0 4/11/2011 PDF 207.6 KB
PCN06A-14 Affected Device List PCN06A-14 1.0 10/3/2014 XLSX 45.1 KB
PCN06A-14 Characterization Report PCN06A-14 1.0 10/3/2014 PDF 563.7 KB
PCN06A-14 Material Set Table PCN06A-14 1.0 10/3/2014 XLSX 13.7 KB
PCN06A-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products PCN06A-14 1.0 10/3/2014 PDF 206.5 KB
PCN07C-11 Withdrawal of PCN07B-11 PCN07C-11 1.0 8/1/2011 PDF 917.9 KB
PCN08A13_AffectedDevices PCN08A-13 1 9/26/2013 XLSX 78.2 KB
PCN10A-11 Notification of Intent to Freeze ispLEVER After Version 8.2 PCN10A-11 1.0 7/25/2011 PDF 52.7 KB
PCN11A-10 Notification of Change of Ordering Part Number for the LFE3-70E and LFE3-95E to the LFE3-70EA and LFE3-95EA, Respectively PCN11A-10 1 7/9/2010 PDF 59 KB
PCN11A-10 Notification of Change of Ordering Part Number for the LFE3-70E and LFE3-95E to the LFE3-70EA and LFE3-95EA, Respectively - Japanese Language PCN11A-10 1 7/9/2010 PDF 144.1 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice OrCAD Capture Schematic Library (OLB) 4.3 11/12/2014 ZIP 960.4 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
ECP3 Automotive Product Brochure 7/2/2013 PDF 2.5 MB
Ethernet Solutions Brochure I0194 12/16/2009 PDF 2 MB
IP Suites for LatticeECP3 - News Brief NB101 2/4/2011 PDF 458.8 KB
Lattice HetNet Solutions Brochure 1.0 11/12/2013 PDF 2.2 MB
LatticeECP3 Family Product Brochure I0198 H 5/29/2012 PDF 2.7 MB
LatticeECP3 Product Brief (Chinese Language Version) I0198C 5/29/2012 PDF 3.1 MB
LatticeECP3 Versa Development Kit - News Brief NB103 2.0 7/5/2012 PDF 364.2 KB
LatticeECP3: First PCIe 2.0 Compliant Low Cost FPGA - News Brief NB104 7/1/2011 PDF 479.5 KB
New LatticeECP3 Devices - News Brief NB106 1.0 1/23/2012 PDF 343.5 KB
PCI Express Solutions Brochure I0195 5/14/2010 PDF 1.8 MB
Product Selector Guide I0211K 8/30/2014 PDF 4.8 MB
SERCOS III Evaluation Kit Product Brief I0223 2/24/2012 PDF 772.8 KB
Wireless Solutions Brochure I0197 8/14/2012 PDF 2 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeECP3 PCI Express Development Kit Installation Read Me - Linux 3/9/2011 TXT 0.2 KB
LatticeECP3 PCI Express Development Kit Installation Read Me - Windows 3/9/2011 TXT 0.2 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
Designing for Low Power (LatticeECP3) 1.0 3/10/2010 PDF 140.2 KB
Embedded Display Control Using FPGAs (Chinese Language) 1.0 6/28/2010 PDF 1.5 MB
Embedded Signal Processing Capabilities of the LatticeECP3 sysDSP Block 1.0 2/19/2009 PDF 195.9 KB
Embedded Signal Processing Capabilities of the LatticeECP3 sysDSP Block (Chinese Language) 1.0 6/8/2009 PDF 457.9 KB
Expanding Microprocessor Connectivity Using Low-cost FPGAs 1.0 8/28/2013 PDF 474.4 KB
FPGAs in Next Generation Wireless Networks (Chinese Language) 5/22/2013 PDF 3.5 MB
FPGAs in Next Generation Wireless Networks (Japanese Language) 1.0 3/10/2010 PDF 284.1 KB
FPGAs in Next Generation Wireless Networks (Korean Language) 5/22/2013 PDF 3.9 MB
FPGAs in Next Generation Wireless Networks (LatticeECP3) 1.0 3/10/2010 PDF 174.7 KB
FPGAs in Next Generation Wireless Networks (Traditional Chinese Language) 1.0 5/22/2013 PDF 1.5 MB
Gen2 Serial RapidIO and Low Cost Low Power FPGAs (Korean Language) 1.0 9/26/2011 PDF 349 KB
GEN2 Serial RapidIO and Low Cost, Low Power FPGAs 1.0 8/4/2011 PDF 276 KB
GEN2 Serial RapidIO and Low Cost, Low Power FPGAs - Chinese Language 1.0 5/22/2013 220.2 KB
High-Speed SERDES Interfaces In High Value FPGAs (LatticeECP3) 1.0 2/19/2009 PDF 503 KB
Implementing DDR3 Memory Controller (LatticeECP3) 1.0 3/10/2010 PDF 147.9 KB
Implementing PCI Express Bridging Solutions in an FPGA 1.0 7/1/2010 PDF 970.1 KB
Implementing PCI Express Bridging Solutions in an FPGA (Chinese Language) 1.0 7/1/2010 PDF 1007.1 KB
Leveraging MIPI D-PHY-based Peripherals in Embedded Designs 1.0 5/1/2014 PDF 567.3 KB
Power Considerations in FPGA Design (Chinese Language) 1.0 6/8/2009 PDF 814.7 KB
Power Considerations in FPGA Design (LatticeECP3) 1.0 2/19/2009 PDF 282.1 KB
Power WP - Design Example Source Code (LatticeECP3) 1.0 2/17/2009 ZIP 1.4 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
[BSDL] LFE3-150EA FPBGA1156 1.01 9/10/2012 BSM 125.8 KB
[BSDL] LFE3-150EA FPBGA672 1.01 9/10/2012 BSM 97.9 KB
[BSDL] LFE3-17EA CSBGA328 1.01 2/14/2014 BSM 41.3 KB
[BSDL] LFE3-17EA FPBGA256 1.02 2/14/2014 BSM 40.8 KB
[BSDL] LFE3-17EA FPBGA484 1.02 2/12/2014 BSM 52.2 KB
[BSDL] LFE3-35EA FPBGA256 1.01 9/10/2012 BSM 47.9 KB
[BSDL] LFE3-35EA FPBGA484 1.02 2/7/2014 BSM 63.6 KB
[BSDL] LFE3-35EA FPBGA672 1.01 9/10/2012 BSM 69.5 KB
[BSDL] LFE3-70E FPBGA1156 1.03 9/10/2012 BSM 110.2 KB
[BSDL] LFE3-70E FPBGA484 1.02 9/10/2012 BSM 77.7 KB
[BSDL] LFE3-70E FPBGA672 1.02 9/10/2012 BSM 89.1 KB
[BSDL] LFE3-70EA FPBGA1156 1.01 9/10/2012 BSM 109.9 KB
[BSDL] LFE3-70EA FPBGA484 1.01 9/10/2012 BSM 77.5 KB
[BSDL] LFE3-70EA FPBGA672 1.01 9/10/2012 BSM 88.9 KB
[BSDL] LFE3-95E FPBGA1156 1.02 9/10/2012 BSM 110.1 KB
[BSDL] LFE3-95E FPBGA484 1.03 9/10/2012 BSM 77.8 KB
[BSDL] LFE3-95E FPBGA672 1.03 9/10/2012 BSM 89.2 KB
[BSDL] LFE3-95EA FPBGA1156 1.01 9/10/2012 BSM 109.9 KB
[BSDL] LFE3-95EA FPBGA484 1.01 9/10/2012 BSM 77.5 KB
[BSDL] LFE3-95EA FPBGA672 1.01 9/10/2012 BSM 88.9 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
ECP3 Device Family DELPHI Models 1.0 3/20/2009 ZIP 247.2 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
[IBIS] Lattice ECP3 2.2 9/10/2012 IBS 64.3 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeECP3 Versa Kit - SerDes Eye Backplane Demo - Design Files for Linux 01.0 5/22/2013 GZ 2.7 MB
LatticeECP3 Versa Kit - SerDes Eye Backplane Demo - Design Files for Windows 1.0 5/22/2013 EXE 4.8 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
DDR2 Demo for the LatticeECP3 Serial Protocol Board - demo files 5/22/2013 ZIP 582.7 KB
ECP3 PCI Express Development Kit Demos (Linux) 5/22/2013 GZ 56.2 MB
ECP3 PCI Express Development Kit Demos (Windows) 5/22/2013 EXE 48.5 MB
LatticeECP3 CPRI Demo Design 2.0 5/3/2012 ZIP 7.2 MB
LatticeECP3 DDR3 Demo 1.4 6/8/2012 ZIP 235.3 KB
LatticeECP3 PCI Express Root Complex Lite x1 Native Demo 1.0 11/1/2010 ZIP 2.7 MB
LatticeECP3 SERDES Eye/Backplane Demo Design 1.1 8/4/2010 ZIP 874.3 KB
LatticeECP3 XAUI Demo 1.3 6/16/2011 ZIP 1.8 MB
Tri-Rate SMPTE SDI Demo 2.0 4/24/2014 ZIP 1.5 MB
Tri-Rate SMPTE SDI Demo 1.0 4/30/2009 ZIP 1.5 MB

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