OpenLDI/FPD-Link/LVDS Receiver IP Core

Convert FPD-LINK Video Streams to Pixel Clock Domain

We're upgrading our website on August 31st! You may experience brief interruptions during the transition. Thank you for your patience.

Related Products

Related Applications

The Lattice Semiconductor FPD-Link Receiver IP translates video streams from a processor with an OpenLDI/FDP-Link/LVDS interface connection to the pixel clock domain. This IP can be used to connect with other application interfaces, such as the Mobile Industry Processor Interface (MIPI®) Display Serial Interface (DSI), by integrating it with the Pixel-to-Byte Converter and CSI-2/DSI D-PHY Transmitter IP cores.

Resource Utilization details are available in the IP Core User Guide.

Features

  • Compliant with Open LVDS Display Interface (OpenLDI) v0.95 specifications.
  • Receives in OpenLDI unbalanced operating mode format.
  • Supports RGB888 and RGB666 video formats.
  • Supports receiving in Dual Channel Flat Panel Display Link protocol (7:1 LVDS).
  • Supports three to four LVDS data lanes per channel.

Block Diagram

FPD-LINK-ReceiverExpand Image

Ordering Information

The FPD-Link Receiver IP is provided at no additional cost with the Lattice Radiant™ software.​

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
OpenLDI/FPD-Link/LVDS Receiver IP Core - User Guide
FPGA-IPUG-02116 1.6 6/26/2026 PDF 1.2 MB
OpenLDI/FPD-LINK/LVDS Receiver Interface IP User Guide - Lattice Diamond Software
FPGA-IPUG-02021 1.4 5/3/2024 PDF 1.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
OpenLDI/FPD-Link/LVDS Receiver IP Core - Release Notes
FPGA-RN-02013 1.3 6/26/2026 PDF 337.8 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

Design Resources for CrossLink

Development Kits & Boards

Our development boards & kits help streamline your design process

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

ABOUT LATTICE

SALES

SUPPORT

FOLLOW