Bank 3, 4, and 5 are the High Speed Banks that support True LVDS.
For Bank 6 and 7, although pins can operate through differential pair, its speed is limited to LVCMOS (Input and Output) or LVDS25E (output).
Single ended termination with programmable 40/50/60/75 \u2126 resistor is supported on all banks, but only banks 3, 4 and 5 support on-chip 100\u2126 dynamic differential input termination.