No, there are external connections required on the circuit board. The clocks from the CPLD and FPGA need to be routed externally for proper device operation.
- The 250kHz clock is generated in the CPLD and must be tied to the FPGA.
- The 8MHz MCLK pin is from the internal oscillator and must be tied to the FPGA.
- OUT16 pin must be tied to an FPGA input to drive long timers.
Below are some links with detailed information related to using timers in the Platform Manager and various hardware requirements.
Tech-Note TN1223 shows all the external connections required for clock signals and all power supply pins. Reference Design RD1079 includes a long timer example for the hardware and software.