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  • FFT Compiler IP Core

    IP Core

    FFT Compiler IP Core

    The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.
    FFT Compiler IP Core
  • PCI Express x1, x4 Root Complex Lite IP Core

    IP Core

    PCI Express x1, x4 Root Complex Lite IP Core

    Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack
    PCI Express x1, x4 Root Complex Lite IP Core
  • JESD204 ADC リファレンス・デザイン

    Reference Design

    JESD204 ADC リファレンス・デザイン

    Provides designers an ideal platform for a low cost, low power and small footprint solution for FPGA based serial data acquisition and processing
    JESD204 ADC リファレンス・デザイン
  • Tri-Speed イーサネット・メディアアクセス・コントローラ

    IP Core

    Tri-Speed イーサネット・メディアアクセス・コントローラ

    ホストプロセッサとイーサネットネットワーク間でデータの送受信をします。 IEEE 802.3準拠、10/100/1000 オペレーションをサポート。
    Tri-Speed イーサネット・メディアアクセス・コントローラ
  • カラー・スペース・コンバータの概要

    IP Core

    カラー・スペース・コンバータの概要

    The Lattice Color Space Converter IP Core is widely parameterizable and can support any custom color space conversion requirement.
    カラー・スペース・コンバータの概要
  • LatticeMico32、オープンで無償の32ビット・ソフトプロセッサ

    IP Core

    LatticeMico32、オープンで無償の32ビット・ソフトプロセッサ

    A 32-bit Harvard, RISC architecture soft microprocessor, available for free with an open IP core license. Many compatible modules and IP are available.
    LatticeMico32、オープンで無償の32ビット・ソフトプロセッサ
  • FlinQ – Flawless Link Quality Encoder / Decoder IP-cores

    IP Core

    FlinQ – Flawless Link Quality Encoder / Decoder IP-cores

    FlinQ™ enables higher quality and a significant gain of efficiency for high performance and reliable visual communication over both wired and wireless links.
    FlinQ – Flawless Link Quality Encoder / Decoder IP-cores
  • TICO-RAW Encoder/Decoder IP-cores

    IP Core

    TICO-RAW Encoder/Decoder IP-cores

    TICO-RAW is a revolutionary RAW compression, extremely tiny & low power, with low latency and lossless quality to handle camera and sensor data (Bayer).
    TICO-RAW Encoder/Decoder IP-cores
  • TICO-XS (JPEG XS) Encoder / Decoder IP-cores

    IP Core

    TICO-XS (JPEG XS) Encoder / Decoder IP-cores

    JPEG XS is the new revolutionary codec, extremely tiny in Lattice FPGA, robust for real-time operation with zero latency and lossless quality
    TICO-XS (JPEG XS) Encoder / Decoder IP-cores
  • Coordinate Rotational Digital Computer (CORDIC) IP Core

    IP Core

    Coordinate Rotational Digital Computer (CORDIC) IP Core

    The Lattice CORDIC IP uses full internal precision while allowing variable output precision with several choices for rounding.
    Coordinate Rotational Digital Computer (CORDIC) IP Core
  • XAUI 10Gbイーサネット・アタッチメント・ユニット・インターフェース

    IP Core

    XAUI 10Gbイーサネット・アタッチメント・ユニット・インターフェース

    10Gb Ethernet Attachment Unit Interface or XAUI includes support for the XAUI which is used to interface with physical layer devices in 10GbE networks.
    XAUI 10Gbイーサネット・アタッチメント・ユニット・インターフェース
  • ガンマ補正

    IP Core

    ガンマ補正

    The Lattice Gamma Corrector IP core is a multi-color plane gamma correction system that can support almost any custom gamma correction requirement.
    ガンマ補正
  • 2D Scaler IP Core

    IP Core

    2D Scaler IP Core

    Highly-configurable design to convert input video frames of one size to output video frames of a different size
    2D Scaler IP Core
  • CPRI

    IP Core

    CPRI

    Implements the physical layer of the CPRI specification (basic function) and link delay accuracy (low latency character).
    CPRI
  • 数値制御発振器

    IP Core

    数値制御発振器

    Also called a Direct Digital Synthesizer (DDS). Supports multiple channels and a Quadrature Amplitude Modulation (QAM) mode, plus other usual configurations
    DSP 
    数値制御発振器
  • 2D Edge Detector

    IP Core

    2D Edge Detector

    Detects edges in incoming video frames using the Sobel or Prewitt algorithms.
    2D Edge Detector
  • 2D FIR Filter

    IP Core

    2D FIR Filter

    Performs real-time 2D convolution of windowed portions of incoming video frames with coefficient matrices held in internal memory
    2D FIR Filter
  • ADC インターフェース

    Reference Design

    ADC インターフェース

    Interfaces with the Texas Instruments (TI) ADS64XX family of ADCs via LatticeECP3 FPGA high-speed LVDS I/O
    ADC インターフェース
  • Median Filter

    IP Core

    Median Filter

    Popular method of noise removal in signal processing. Supports many video frame sizes.
    Median Filter
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