Quickly configure and integrate an RPC DRAM interface – This IP core is available from Etron, but uses the standard Lattice FPGA design tools and design flow to configure and integrate to your application’s specific needs.
About RPC DRAM - RPC DRAM is a high bandwidth x16-organized DDR-type DRAM, suitable for high bandwidth applications including high resolution video buffering, but featuring low pincount (24 switching IOs): using approximately half the interface pins of DDR3/LPDDR3 yet offering the same bandwidth with similar high bus efficiency.
Small, low-power, high-performance memory - RPC DRAM is available in Wafer Level CSP packaging, occupying less than 10% of the PCB area of a standard x16 type DDR3 DRAM. When paired with the highly-efficient package options for the ECP5 FPGA family, RPC DRAM enables an unprecedented level of system miniaturization.
Features
- Interfaces to Etron Technology RPC DRAM components compliant with the RPC DRAM Standard
- Supports to x16 RPC DRAM at speeds up to 400 MHz / 800 Mbps in -8 speed grade devices with memory data path widths of -16, and -32 bits or multiples thereof
- AXI application interface option
- Fully interleaved bank operation with overlapped Bank Precharge and Row Activation / Column Burst Accesses
- Pipelined streaming mode supports infinitely long sustained read / write burst access to full memory supported with random column/bank addressing for high bus efficiency
