This reference design provides a programmable solution for serial expansion of microprocessor general purpose I/O ports. It uses a Serial Peripheral Interface (SPI) as the interface between the microprocessor and the GPIOs. The design provides additional control and monitoring capabilities for the microprocessor when it does not have sufficient GPIOs to do the job.
Features
- SPI-compatible serial interface to the host
- 16 GPIOs can be configured as inputs or outputs
- GPIOs configured as inputs can cause an interrupt request to the host
- Interrupts can be masked if necessary
- All GPIOs are configured as inputs at hardware reset
- 16 GPIOs can be accessed individually at once; some combinations of four or eight GPIOs can be accessed as a group; all 16 GPIOs can be accessed as a group
