I2C Bus Controller for Serial EEPROMs

Reference Design LogoThis I2C Bus controller provides an interface between standard microprocessors and I2C Serial EEPROM devices. It is intended to be a simple controller providing random reads cycles only. SDRAM modules implement a Serial EPROM that supports the I2C protocol. Typically, serial EPROMS are programmed at board assembly time and store configuration information, which is read by a microprocessor during power-up. This design assumes the reader has experience with I2C controllers. This design conforms to the Philips I2C Bus Specification version 1.0.

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Block Diagram

Performance and Size

Device Family Tested Devices* Performance I/O Pins Design Size Revision
ECP5™ 6 LFE5U-45F-
6MG285C
>50MHz 18 85 LUTs (Verilog Source)
85 LUTs (VHDL Source)
2.6
LatticeECP3™ 3 LFE3-17EA-
6FTN256C
>50MHz 18 96 LUTs (Verilog Source)
94 LUTs (VHDL Source)
2.6
MachXO3L™ 7 LCMXO3L-4300C-
6BG256C
>50MHz 18 85 LUTs (Verilog-LSE Source)
84 LUTs (Verilog-Syn Source)
2.6
84 LUTs (Verilog-LSE Source)
86 LUTs (Verilog-Syn Source)
2.6
MachXO2™ 1 LCMXO2-1200HC-
6TG144C
>50MHz 18 86 LUTs (Verilog Source)
85 LUTs (VHDL Source)
2.6
MachXO™ 2 LCMXO256E-
3T100C
>50MHz 18 82 LUTs (Verilog Source)
82 LUTs (VHDL Source)
2.6
LatticeP2™ 4 LFXP2-5E-
5M132C
>50MHz 18 89 LUTs (Verilog Source)
90 LUTs (VHDL Source)
2.6
ispMACH® 4000ZE 5 LC4256ZE-
5TN100C
>50MHz 18 89 Macrocells (Verilog Source)
90 Macrocells (VHDL Source)
2.6

1. Performance and utilization characteristics are generated using LCMXO2-1200HC-6TG144C with Lattice Diamond® 3.1 design software with LSE (Lattice Synthesis Engine).
2. Performance and utilization characteristics are generated using LCMXO256E-3T100C with Lattice Diamond 3.1 design software with LSE.
3. Performance and utilization characteristics are generated using LFE3-17EA-6FTN256C with Lattice Diamond 3.1 design software.
4. Performance and utilization characteristics are generated using LFXP2-5E-5M132C with Lattice Diamond 3.1 design software.
5. Performance and utilization characteristics are generated using LC4256ZE-5TN100C with Lattice Diamond 3.1 design software.
6. Performance and utilization characteristics are generated using LFE5U-45F-6MG285C with Lattice Diamond 3.1 design software with LSE.
7. Performance and utilization characteristics are generated using LCMXO3L-4300C-6BG256C with Lattice Diamond 3.1 design software with LSE and Synplify Pro.

* May work in other devices as well.

Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise.

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
I2C Controller for Serial EEPROMs - Documentation
RD1006 2.6 3/5/2014
I2C Controller for Serial EEPROMs - Source Code
RD1006 2.7 1/12/2015


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