The Secure Digital (SD) Card is a Flash-based memory card that is widely used in today’s consumer electronic devices. Its high-capacity, compact package and security make it a suitable candidate for both video and audio applications in electronic products. The interface of the SD Flash Controller is based on the WISHBONE bus standard. The WISHBONE interconnection makes system-on-chip (SoC) and design reuse easy by creating a standard data exchange protocol. The SD Flash Controller with WISHBONE bus interface allows the designer to easily connect SoC systems to a standard SD card. It includes reset, initialization, reading of a single block and writing of a single block.
Jump to
Block Diagram
Performance and Size
| Tested Devices* | Performance | I/O Pins | Design Size | Revision |
|---|---|---|---|---|
| LCMXO2280C-3T100C | >50 MHz | 34 | 875 LUTs, 1 EBR | 1.2 |
| LFXP2-5E-5TN144C | >50 MHz | 34 | 1088 LUTs, 1 EBR | 1.2 |
1 The Max. Clock Frequency is obtained by running the Timing Analysis of Lattice design software. Please run the timing simulation after you merge it with your design.
* May work in other devices as well.
Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise.
Documentation
To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account
