This reference design implements a Serial Peripheral Interface (SPI) slave device interface that provides full-duplex, synchronous, serial communication with a SPI master. A simple back-end parallel interface provides the flexibility to interface with any system. This reference design instantly adds SPI bus capability to a device in an embedded system.
Features
- SPI slave with full-duplex capability
- Supports 4-clock polarity and clock phase modes
- Shares the SPI bus with other SPI slave devices
- Receives and transmits registers configurable from 1 to 32 bits wide. Longer transfers can be done with software support
- Double-buffered transmission allows new data to be written at the same time that previous data is being shifted out
- Option for least-significant bit or most-significant bit first
