USB32SF IP core is designed to use the Lattice® Semiconductor FPGA built-in transceiver ensuring highest throughput i.e. >3.4Gbps.
Features
- It supports SuperSpeed (SS), High Speed (HS) and Full Speed (FS) communication modes.
- Uses Lattice FPGA Transceiver as a PHY layer and thus eliminates need for external PHY for USB 3.2.
- Provides ULPI interface to interact with external USB 2.0 PHY.
- Capable to support up to 31 endpoints (1 default control endpoint, 15 IN endpoints and 15 OUT endpoints).
- Allows to select number of buffers per endpoint based on the requirement.
