LatticeMico32 Open, Free 32-Bit Soft Processor


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Lattice Mico32 LogoThe LatticeMico32™ is a 32-bit Harvard, RISC architecture "soft" microprocessor, available for free with an open IP core licensing agreement. The LatticeMico32 provides the visibility, flexibility and portability that you expect in an open source hardware design. Everything you need is provided, including software development tools (via LatticeMico™ System) and evaluation boards to try out your designs in hardware.

By combining a 32-bit wide instruction set with 32 general purpose registers, the LatticeMico32 provides the performance and flexibility suitable for a wide variety of markets. Using a RISC architecture, the core consumes minimal device resources, while maintaining the performance required for a broad application set. To accelerate the development of microprocessor systems, several optional WISHBONE compatible peripheral components may be integrated with the LatticeMico32.

WISHBONE Compatible Peripheral Components

To accelerate the development of microprocessor systems, several optional WISHBONE compatible peripheral components may be integrated with the LatticeMico32.

  • Memory controllers
    • DDR, DDR2 & DDR3 SDRAM
    • Asynchronous SRAM
    • On-chip Block Memory
    • SDRAM controller
    • On-chip dual port memory
    • SPI Flash
    • Parallel Flash
  • I/O
    • 32-bit Timer
    • DMA Controller
    • GPIO
    • I2C Master Controller
    • SPI
    • Tri-Speed Ethernet MAC
    • UART
    • PCI Target

Three Configurations to Optimize Area and Performance

  • Basic
    • No Multiplier
    • Multicycle Shifter
    • No Cache
  • Standard
    • Multiplier
    • Pipelined Shifter
    • 8K I-Cache, No D-Cache
  • Full
    • Multiplier
    • Pipelined Shifter
    • 8K I-Cache, 8K D-Cache

Development Tools

LatticeMico System is to be used to implement a LatticeMico32 system with attached peripheral components. It is based on the Eclipse C/C++ Development Tools Environment, which is an industry open-source development and application framework for building software.

Supported Development Boards

Lattice has pre-defined a number of its development boards as platforms within the LatticeMico System Software. This allows you to rapidly start developing LatticeMico32 based systems on these boards. The following boards have been developed:

  • LatticeMico32 Development Board for LatticeECP2
  • LatticeMico32 Development Board for LatticeECP

Features

  • Optimized for Lattice FPGA Devices
  • Performance Enhanced Feature Set
    • RISC architecture
    • 32-bit data path and 32-bit instructions
    • 32 general purpose registers
    • Handles up to 32 external interrupts
    • Optional instruction and data caches
    • Dual WISHBONE memory interfaces (Instruction and Data)

Jump to

Block Diagram

Lattice Mico32 Core

Performance and Size

Performance and Resource Utilization1
Lattice FPGA Family Configuration LUTs fMAX (MHz)
LatticeECP3 Standard 2,370 115
LatticeXP2TM Standard 2,406 85
LatticeECP2/M Standard 2,497 110

1Performance and utilization characteristics are generated using Lattice Diamond software. When using the LatticeMico32 in a different density, speed, or grade within the Lattice FPGA family, performance may vary.

Ordering Information

LatticeMico32, and its associated peripheral components are included within the LatticeMico System Development Tool. This tool is provided free of charge.

For the latest information on LatticeMico System Development Tools, including instructions on how to download and install, go to the page located here.

For information about the LatticeMico32 for other Lattice FPGA families, please contact your local Lattice Sales Office.

Documentation

Quick Reference
Information Resources
Downloads
TITLENUMBERVERSIONDATEFORMATSIZE
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LatticeMico Asynchronous SRAM Controller 3.3
3.36/16/2015PDF338 KB
LatticeMico DMA Controller 3.3
3.36/16/2015PDF404.2 KB
LatticeMico Dual-Port On-Chip Memory Controller 3.1
3.16/16/2015PDF738.2 KB
LatticeMico Embedded Function Block 1.6
1.66/16/2015PDF422.5 KB
LatticeMico GPIO 3.5
3.56/16/2015PDF316.8 KB
LatticeMico Master Passthrough 3.3
3.36/16/2015PDF80.2 KB
LatticeMico Memory Passthrough 3.1
3.16/16/2015PDF80.5 KB
LatticeMico On-Chip Memory Controller
3.41/14/2015PDF187.8 KB
LatticeMico Parallel Flash Controller 3.2
3.26/16/2015PDF250.2 KB
LatticeMico SPI 3.1
3.16/16/2015PDF302.5 KB
LatticeMico SPI Flash 3.7
3.76/16/2015PDF234.8 KB
LatticeMico Timer 3.1
3.16/16/2015PDF278 KB
LatticeMico UART 3.8
3.86/16/2015PDF387.4 KB
LatticeMico32 Asynchronous SRAM Controller
1.111/15/2010PDF232.7 KB
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LatticeMico32 Migration Concerns Post ispLEVER 8.1 and Diamond 1.0
TN122111/5/2010PDF404.1 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

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JSP Kernel User Guide
1.6.14/14/2008PDF302.3 KB
LatticeMico32 HW Developer User Guide
1.010/10/2017PDF1.4 MB
LatticeMico32 Processor Reference Manual 2.1
2.11/21/2013PDF898.8 KB
LatticeMico32 SW Developer User Guide
1.010/10/2017PDF5 MB
LatticeMico32 Tri-Speed Ethernet MAC Demo
3/1/2007PDF1 MB
LatticeMico32/DSP Development Board for LatticeECP2 Devices User's Guide
Contains description of components, and board schematics.
EB262.66/4/2009PDF1.9 MB
LatticeMico32/DSP Development Board User Guide
Contains description of components, and board schematics.
EB1701.412/15/2008PDF2.4 MB
LatticeMico8 Processor Reference Manual 2.1
2.11/21/2013PDF572.2 KB
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Lattice Diamond Software Product Brief
Product Brochure for Lattice Diamond software.
I0207GRev. 26/20/2019PDF1.9 MB
LatticeMico32 Product Brief
I01867/10/2012PDF1.2 MB
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LatticeMico32 Tutorial
1.010/10/2017PDF7.8 MB
LatticeMico32 Tutorial 3.9
1.02/21/2017PDF7.8 MB
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The Challenges of Automotive Vision Systems Design
4/1/2007PDF341.5 KB
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LatticeMico32 DDR SDRAM Demo
Targeted for ECP LatticeMico32 standard board.
2/27/2009ZIP13.8 MB
LatticeMico32 Gigabit Ethernet MAC Demo
10/25/2007ZIP19.6 MB
LatticeMico32 Tri-Speed Ethernet MAC Demo
7.1SP110/15/2008ZIP13.8 MB