文章详情

ID: 1514
实例类型: faq
分类: Lattice IP/Reference Design
相关: 10Gb+ Ethernet MAC
产品系列: All FPGA

搜索答案数据库

Search Text Image

LatticeSC/M: What effect does a PCS local/remote fault signal to the 10Gb+ Ethernet MAC have on the MAC TX and RX logic?

Description:

The XAUI PCS communicates the local/remote link fault to the MAC via the XGMII RX data/control bus during the IDLE period, as defined by the IEEE specification. No other signals are used to communicate fault signaling.


When the RX MAC receives a fault sequence, the fault sequence in the receive pattern can only occur during the idle sequence between 2 RX frames as defined by the IEEE spec.


If the MAC receives a fault sequence, the TX and RX MAC logic will respond in the following manner:



  • MAC TX: The MAC completes the current frame transmission first before responding with an appropriate sequence.

  • MAC RX: If MAC receives a local fault, then the MAC RX logic drops the corresponding packet.