FPD-LINK发送器

将像素数据流转换为FPD-LINK视频流

市场上对于显示屏的要求和需求变得越来越高,桥接应用也变得越来越受欢迎。一个常用的应用接口实例是平板显示屏连接(FPD-LINK)接口。

低压差分信号(LVDS)标准通常用于消费电子设备、工业控制、医疗和汽车行业的高速差分接口。与单端技术相比,LVDS接口具备低电压、低功耗和增强的信号完整性等优势。Channel Link、FPD-Link和Camera Link等应用使用LVDS作为物理层接口。

7:1 LVDS接口是源同步接口的常用标准,由多个数据位和时钟组成。通常,1通道的7:1 LVDS接口由5个LVDS对(1个时钟信号,4个数据信号)组成,具体取决于它支持的数据类型。

莱迪思的OpenLDI/FPD-LINK/LVDS发射器接口IP将DSI视频流(如MIPI DSI显示接口等)转换为LVDS接口,用于实现到显示屏的FDP-Link互连。

特性

  • 符合Open LVDS显示接口(OpenLDI)v0.95规范
  • 使用OpenLDI非平衡运行模式格式发送
  • 支持RGB888和RGB666视频格式
  • 支持使用双通道平板显示屏互连协议(7:1 LVDS)传输视频
  • 支持每通道3-4个LVDS数据通道

Block Diagram

Resource Utilization

For Avant family
LAV-AT-500E-3LFG1156C
Configuration Clk Fmax (MHz) Slice Registers LUTs EBRs
Default 200 18 29 0
Number of TX Channels = 2, Others = Default 200 18 29 0
Data Type = RGB666, Others = Default 200 18 29 0
Number of TX Channels = 2, Data Type = RGB666, Others = Default 200 18 29 0

Note: Above shows the resource utilization of the OpenLDI/FPD-LINK/LVDS Transmitter Core for the LAV-AT-500E-3LFG1156C device using Lattice Synthesis Engine of the Lattice Radiant software. Default configuration is used and some attributes are changed from the default value to show the effect on the resource utilization.

For Nexus family (CrossLink-NX)
LIFCL-40-9BG400I
Configuration Clk Fmax (MHz) Slice Registers LUTs EBRs
Default 200 18 40 0
Number of TX Channels = 2, Others = Default 200 18 39 0
Data Type = RGB666, Others = Default 200 18 40 0
Number of TX Channels = 2, Data Type = RGB666, Others = Default 200 18 39 0

Notes: Above shows the resource utilization of the OpenLDI/FPD-LINK/LVDS Transmitter Core for the LIFCL-40-9BG400I device using Lattice Synthesis Engine of the Lattice Radiant software. Default configuration is used and some attributes are changed from the default value to show the effect on the resource utilization.

1. Fmax is generated when the FPGA design only contains OpenLDI/FPD-LINK/LVDS Transmitter Core and the target frequency is 135 MHz. These values may be reduced when user logic is added to the FPGA design.
2. The distributed RAM utilization is accounted for in the total LUT4s utilization. The actual LUT4 utilization is distribution among logic, distributed RAM, and ripple logic.

Ordering Information

  Part Number
Device Family Multi-site Perpetual Single Seat Annual
Avant-G FPD-TX-AVG-UT FPD-TX-AVG-US
Avant-X FPD-TX-AVX-UT FPD-TX-AVX-US
Avant-E FPD-TX-AVE-UT FPD-TX-AVE-US
MachXO5-NX FPD-TX-XO5-UT FPD-TX-XO5-US
CertusPro-NX FPD-TX-CPNX-UT FPD-TX-CPNX-US
Certus-NX FPD-TX-CTNX-UT FPD-TX-CTNX-US
CrossLink-NX FPD-TX-CNX-UT FPD-TX-CNX-US

To download a full evaluation version of this IP, go to the IP Server in Lattice Radiant. This IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to generate the IP core and operate in hardware for a limited time (approximately four hours) without requiring an IP license.

To find out how to purchase the FPD-Link Transmitter IP core, please contact your local Lattice Sales Office.

文档

快速参考
标题 编号 版本 日期 格式 文件大小
选择全部
OpenLDI/FPD-LINK/LVDS Transmitter Interface IP Core - Lattice Radiant Software
FPGA-IPUG-02117 1.2 1/8/2024 PDF 835.4 KB
OpenLDI/FPD-LINK/LVDS Transmitter Interface IP Core - Lattice Diamond Software
FPGA-IPUG-02022 1.2 12/16/2020 PDF 2.1 MB

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