H16550S是一个标准的UART，提供与流行的Texas Instruments 16550器件100%的软件兼容性。它对源自调制解调器或其他串行设备的数据进行串-并转换，并对从CPU到这些设备的数据进行并-串转换。
H16550S可以在16450兼容的字符模式或16550兼容的FIFO模式下工作，后者有一个内部FIFO减轻了CPU过多的软件开销。
H16550S为方便重复使用而开发，专为几款莱迪思器件进行了优化，提供具有竞争力的利用率和性能特点。
Features
- Capable of running all existing 16450 and 16550a software
- Fully Synchronous design. All inputs and outputs are based on rising edge of clock
- In FIFO mode, the transmitter and receiver are each buffered with 16 byte FIFOs to reduce the number of interrupts presented to the CPU
- Adds or deletes standard asynchronous communication bits (start, stop and parity) to or from the serial data
- Independently controlled transmit, receive, line status and data set interrupts
- Programmable baud generator divides any input clock by 1 to (216 - 1) and generates the 16 x clock
- Modem control functions (CTSn, RTSn, DSRn, DTRn, RIn, and DCDn)
- Fully programmable serial interface characteristics:
- 5, 6, 7, or 8 bit characters
- Even, odd, or no-parity bit generation and detection
- 1, 1_, or 2 stop bit generation
- Baud generation
- False start bit detection
- Complete status register
- Internal diagnostic capabilities: loopback controls for communications link fault isolation
- Full prioritized interrupt system controls
Applications
- Serial or modem computer interface
- Serial interface within modems and other devices
