Project Settings
Project Name proj_1 Device Name impl_1: Lattice MachXO4LF : LFMXO4_9400C
Implementation Name impl_1 Top Module byteCounter
Pipelining 1 Retiming 0
Resource Sharing 1 Fanout Guide 1000
Disable I/O Insertion 0 Disable Sequential Optimizations 0
Clock Conversion 0 FSM Compiler 1

Run Status
Job Name Status CPU Time Real Time Memory Date/Time
(compiler)Complete 78 4 0 - 00m:14s - 15-11-2025
12:11
(premap)Complete 5 1 0 0m:03s 0m:03s 260MB 15-11-2025
12:11
(fpga_mapper)Complete 9 59 0 0m:06s 0m:06s 265MB 15-11-2025
12:11
Multi-srs Generator Complete15-11-2025
12:11

Area Summary
Register bits 58 I/O cells 9
Block RAMs (v_ram) 0 DSPs (dsp_used) 0
ORCA LUTs (total_luts) 20

Timing Summary
Clock NameReq FreqEst FreqSlack
byteCounter|clk_p_inferred_clock53.2 MHz164.0 MHz12.698

Optimizations Summary
Combined Clock Conversion 0 / 1