Lattice Mapping Report File Design: byteCounter Family: LFCPNX Device: LFCPNX-100 Package: LFG672 Performance Grade: 7_High-Performance_1.0V Mapper: version Radiant Software (64-bit) 2023.1.0.43.3 Mapped on: Thu Jul 20 12:17:27 2023 Design Information Command line: map -i byteCounter_impl_1_syn.udb -pdc C:/Users/VJivan/Documents/Workspace/TestCounter/byteCounter/pins.pdc -o byteCounter_impl_1_map.udb -mp byteCounter_impl_1.mrp -hierrpt -gui Design Summary Number of registers: 1035 out of 80769 (1%) Number of SLICE registers: 1035 out of 79872 (1%) Number of PIO Input registers: 0 out of 299 (0%) Number of PIO Output registers: 0 out of 299 (0%) Number of PIO Tri-State registers: 0 out of 299 (0%) Number of LUT4s: 1901 out of 79872 (2%) Number used as logic LUT4s: 1607 Number used as distributed RAM: 24 (6 per 16X4 RAM) Number used as ripple logic: 270 (2 per CCU2) Number of PIOs used/reserved: 18 out of 299 (6%) Number of PIOs reserved: 3 (per sysConfig and/or prohibit constraint) Number of PIOs used: 15 Number of PIOs used for single ended IO: 13 Number of PIO pairs used for differential IO: 1 Number allocated to regular speed PIOs: 13 out of 167 (8%) Number allocated to high speed PIOs: 2 out of 132 (2%) Number of Dedicated IO used for ADC/PCS/PCIE: 0 out of 60 (0%) Number of IDDR/ODDR/TDDR functions used: 0 out of 730 (0%) Number of IOs using at least one DDR function: 0 (0 differential) Number of Block RAMs: 3 out of 208 (1%) Number of Large RAMs: 0 out of 7 (0%) Number of Logical DSP Functions: Number of Pre-Adders (9+9): 0 out of 312 (0%) Number of Multipliers (18x18): 0 out of 156 (0%) Number of 9X9: 0 (1 18x18 = 2 9x9) Number of 18x18: 0 (1 18x18 = 1 18x18) Number of 18x36: 0 (2 18x18 = 1 18x36) Number of 36x36: 0 (4 18x18 = 1 36x36) Number of 54-bit Accumulators: 0 out of 78 (0%) Number of 18-bit Registers: 0 out of 312 (0%) Number of Physical DSP Components: Number of PREADD9: 0 out of 312 (0%) Number of MULT9: 0 out of 312 (0%) Number of MULT18: 0 out of 156 (0%) Number of MULT18X36: 0 out of 78 (0%) Number of MULT36: 0 out of 39 (0%) Number of ACC54: 0 out of 78 (0%) Number of REG18: 0 out of 312 (0%) Number of ALUREGs: 0 out of 1 (0%) Number of PLLs: 0 out of 4 (0%) Number of DDRDLLs: 0 out of 2 (0%) Number of DLLDELs: 0 out of 10 (0%) Number of DQSs: 0 out of 11 (0%) Number of DCSs: 0 out of 2 (0%) Number of DCCs: 0 out of 62 (0%) Number of PCLKDIVs: 0 out of 2 (0%) Number of ECLKDIVs: 0 out of 12 (0%) Number of ECLKSYNCs: 0 out of 12 (0%) Number of ADC Blocks: 0 out of 1 (0%) Number of SGMIICDRs: 0 out of 2 (0%) Number of PMUs: 0 out of 1 (0%) Number of BNKREF18s: 0 out of 3 (0%) Number of BNKREF33s: 0 out of 5 (0%) Number of I2CFIFOs: 0 out of 1 (0%) Number of Oscillators: 0 out of 1 (0%) Number of GSR: 1 out of 1 (100%) Number of Cryptographic Block: 0 out of 1 (0%) Number of Config IP: 0 out of 1 (0%) TSALL: 0 out of 1 (0%) Number of JTAG: 1 out of 1 (100%) Number of SED: 0 out of 1 (0%) Number of PCSs: 0 out of 2 (0%) Number of PCIE Link Layers: 0 out of 1 (0%) Number of Clocks: 3 Net jtck: 511 loads, 0 rising, 511 falling (Driver: Pin jtaghub_inst.jtagg_u/JTCK) Net jtaghub_inst.tck: 1 loads, 1 rising, 0 falling (Driver: Port TCK) Net clk_p_c: 478 loads, 478 rising, 0 falling (Driver: Port clk_p) Number of Clock Enables: 101 Net trigger_en[1]_N: 3 loads, 0 SLICEs Net jtaghub_inst.er1_shift_reg8: 23 loads, 23 SLICEs Net ip_enable0: 15 loads, 15 SLICEs Net ip_enable1: 15 loads, 15 SLICEs Net jtaghub_inst.JUPDATE: 13 loads, 13 SLICEs Net reveal_coretop_i19101.n37_enable_151: 20 loads, 20 SLICEs Net reveal_coretop_i19101.sample_en_d: 7 loads, 7 SLICEs Net reveal_coretop_i19101.n37_enable_51: 2 loads, 2 SLICEs Net reveal_coretop_i19101.n37_enable_73: 20 loads, 20 SLICEs Net reveal_coretop_i19101.clk[1]_N_keep_enable_92: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_75: 3 loads, 3 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_19: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_24: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_73: 3 loads, 3 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_27: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_20: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_55: 3 loads, 3 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_29: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_25: 1 loads, 1 SLICEs Net secured_signal_474: 1 loads, 1 SLICEs Net secured_signal_480: 2 loads, 2 SLICEs Net secured_signal_485: 2 loads, 2 SLICEs Net secured_signal_509: 1 loads, 1 SLICEs Net secured_signal_537: 9 loads, 9 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.trig_u.num_then_wen: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.next_then_reg_wen: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.cnt_contig_reg_wen: 2 loads, 2 SLICEs Net secured_signal_589: 1 loads, 1 SLICEs Net secured_signal_603: 1 loads, 1 SLICEs Net secured_signal_641: 16 loads, 16 SLICEs Net secured_signal_704: 2 loads, 2 SLICEs Net secured_signal_709: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.cnt_contig_reg_wen_adj_1522: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.next_then_reg_wen_adj_1523: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_21: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_53: 16 loads, 16 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_31: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_36: 3 loads, 3 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_32: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_23: 1 loads, 1 SLICEs Net secured_signal_813: 42 loads, 42 SLICEs Net secured_signal_820: 11 loads, 9 SLICEs Net secured_signal_831: 9 loads, 9 SLICEs Net secured_signal_883: 9 loads, 9 SLICEs Net secured_signal_933: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_26: 1 loads, 1 SLICEs Net secured_signal_947: 1 loads, 1 SLICEs Net secured_signal_1044: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_63: 9 loads, 9 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_83: 9 loads, 9 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.clk[0]_N_keep_enable_89: 2 loads, 2 SLICEs Net secured_signal_1314: 2 loads, 2 SLICEs Net secured_signal_1323: 2 loads, 2 SLICEs Net secured_signal_1423: 1 loads, 1 SLICEs Net secured_signal_1535: 1 loads, 1 SLICEs Net secured_signal_1588: 2 loads, 2 SLICEs Net reveal_coretop_i19101.sample_en_d_adj_1540: 7 loads, 7 SLICEs Net secured_signal_1896: 1 loads, 1 SLICEs Net secured_signal_1900: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_48: 3 loads, 3 SLICEs Net secured_signal_1926: 1 loads, 1 SLICEs Net secured_signal_1930: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_50: 3 loads, 3 SLICEs Net secured_signal_1955: 1 loads, 1 SLICEs Net secured_signal_1957: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_68: 3 loads, 3 SLICEs Net secured_signal_1974: 1 loads, 1 SLICEs Net secured_signal_1980: 2 loads, 2 SLICEs Net secured_signal_1989: 2 loads, 2 SLICEs Net secured_signal_2011: 1 loads, 1 SLICEs Net secured_signal_2047: 9 loads, 9 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.next_then_reg_wen: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.cnt_contig_reg_wen: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.num_then_wen: 1 loads, 1 SLICEs Net secured_signal_2109: 2 loads, 2 SLICEs Net secured_signal_2139: 1 loads, 1 SLICEs Net secured_signal_2149: 1 loads, 1 SLICEs Net secured_signal_2171: 16 loads, 16 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.next_then_reg_wen_adj_1378: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.cnt_contig_reg_wen_adj_1379: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.num_then_wen_adj_1381: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_86: 2 loads, 2 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_84: 16 loads, 16 SLICEs Net secured_signal_2274: 3 loads, 3 SLICEs Net secured_signal_2277: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.clk[1]_N_keep_enable_91: 2 loads, 2 SLICEs Net secured_signal_2315: 1 loads, 1 SLICEs Net secured_signal_2316: 1 loads, 1 SLICEs Net secured_signal_2326: 1 loads, 1 SLICEs Net secured_signal_2377: 2 loads, 2 SLICEs Net secured_signal_2402: 2 loads, 2 SLICEs Net secured_signal_2407: 9 loads, 9 SLICEs Net secured_signal_2417: 9 loads, 9 SLICEs Net secured_signal_2431: 9 loads, 9 SLICEs Net secured_signal_2434: 9 loads, 9 SLICEs Net secured_signal_2446: 10 loads, 9 SLICEs Net secured_signal_2518: 31 loads, 31 SLICEs Net secured_signal_2762: 1 loads, 1 SLICEs Net secured_signal_2855: 2 loads, 2 SLICEs Net secured_signal_2923: 2 loads, 2 SLICEs Net secured_signal_2929: 1 loads, 1 SLICEs Number of LSRs: 88 Net trigger_en[1]_N: 6 loads, 0 SLICEs Net jrstn: 46 loads, 45 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.n367: 208 loads, 208 SLICEs Pin rstn: 30 loads, 30 SLICEs (Net: rstn_c) Net secured_signal_488: 1 loads, 1 SLICEs Net secured_signal_706: 1 loads, 1 SLICEs Net secured_signal_815: 1 loads, 1 SLICEs Net secured_signal_882: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la0_inst_0.wen_jtck: 1 loads, 1 SLICEs Net secured_signal_965: 1 loads, 1 SLICEs Net secured_signal_1047: 1 loads, 1 SLICEs Net secured_signal_1060: 1 loads, 1 SLICEs Net secured_signal_1080: 1 loads, 1 SLICEs Net secured_signal_1094: 1 loads, 1 SLICEs Net secured_signal_1096: 1 loads, 1 SLICEs Net secured_signal_1098: 1 loads, 1 SLICEs Net secured_signal_1100: 1 loads, 1 SLICEs Net secured_signal_1102: 1 loads, 1 SLICEs Net secured_signal_1104: 1 loads, 1 SLICEs Net secured_signal_1106: 1 loads, 1 SLICEs Net secured_signal_1108: 1 loads, 1 SLICEs Net secured_signal_1110: 1 loads, 1 SLICEs Net secured_signal_1112: 1 loads, 1 SLICEs Net secured_signal_1114: 1 loads, 1 SLICEs Net secured_signal_1116: 1 loads, 1 SLICEs Net secured_signal_1118: 1 loads, 1 SLICEs Net secured_signal_1120: 1 loads, 1 SLICEs Net secured_signal_1122: 1 loads, 1 SLICEs Net secured_signal_1124: 1 loads, 1 SLICEs Net secured_signal_1126: 1 loads, 1 SLICEs Net secured_signal_1128: 1 loads, 1 SLICEs Net secured_signal_1130: 1 loads, 1 SLICEs Net secured_signal_1132: 1 loads, 1 SLICEs Net secured_signal_1134: 1 loads, 1 SLICEs Net secured_signal_1136: 1 loads, 1 SLICEs Net secured_signal_1138: 1 loads, 1 SLICEs Net secured_signal_1140: 1 loads, 1 SLICEs Net secured_signal_1142: 1 loads, 1 SLICEs Net secured_signal_1144: 1 loads, 1 SLICEs Net secured_signal_1146: 1 loads, 1 SLICEs Net secured_signal_1148: 1 loads, 1 SLICEs Net secured_signal_1150: 1 loads, 1 SLICEs Net secured_signal_1152: 1 loads, 1 SLICEs Net secured_signal_1154: 1 loads, 1 SLICEs Net secured_signal_1168: 1 loads, 1 SLICEs Net secured_signal_1178: 1 loads, 1 SLICEs Net secured_signal_1180: 1 loads, 1 SLICEs Net secured_signal_1182: 1 loads, 1 SLICEs Net secured_signal_1184: 1 loads, 1 SLICEs Net secured_signal_1760: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.n323: 197 loads, 197 SLICEs Net secured_signal_1985: 1 loads, 1 SLICEs Net secured_signal_2117: 1 loads, 1 SLICEs Net secured_signal_2520: 1 loads, 1 SLICEs Net secured_signal_2528: 1 loads, 1 SLICEs Net secured_signal_2574: 1 loads, 1 SLICEs Net secured_signal_2593: 1 loads, 1 SLICEs Net secured_signal_2612: 1 loads, 1 SLICEs Net secured_signal_2614: 1 loads, 1 SLICEs Net secured_signal_2616: 1 loads, 1 SLICEs Net secured_signal_2618: 1 loads, 1 SLICEs Net secured_signal_2620: 1 loads, 1 SLICEs Net secured_signal_2622: 1 loads, 1 SLICEs Net secured_signal_2624: 1 loads, 1 SLICEs Net secured_signal_2626: 1 loads, 1 SLICEs Net secured_signal_2628: 1 loads, 1 SLICEs Net secured_signal_2630: 1 loads, 1 SLICEs Net secured_signal_2632: 1 loads, 1 SLICEs Net secured_signal_2634: 1 loads, 1 SLICEs Net secured_signal_2636: 1 loads, 1 SLICEs Net secured_signal_2638: 1 loads, 1 SLICEs Net secured_signal_2640: 1 loads, 1 SLICEs Net secured_signal_2642: 1 loads, 1 SLICEs Net secured_signal_2644: 1 loads, 1 SLICEs Net secured_signal_2646: 1 loads, 1 SLICEs Net secured_signal_2648: 1 loads, 1 SLICEs Net secured_signal_2650: 1 loads, 1 SLICEs Net secured_signal_2652: 1 loads, 1 SLICEs Net secured_signal_2654: 1 loads, 1 SLICEs Net secured_signal_2656: 1 loads, 1 SLICEs Net secured_signal_2658: 1 loads, 1 SLICEs Net secured_signal_2660: 1 loads, 1 SLICEs Net secured_signal_2662: 1 loads, 1 SLICEs Net secured_signal_2664: 1 loads, 1 SLICEs Net reveal_coretop_i19101.bytecounter_la1_inst_1.tt_wen_N_1231: 1 loads, 1 SLICEs Net secured_signal_3079: 1 loads, 1 SLICEs Net trigger1_N_1062: 1 loads, 1 SLICEs Net trigger2_N_1064: 1 loads, 1 SLICEs Top 10 highest fanout non-clock nets: Net reveal_coretop_i19101.bytecounter_la0_inst_0.n367: 208 loads Net reveal_coretop_i19101.bytecounter_la1_inst_1.n323: 198 loads Net reveal_coretop_i19101.capture_dr: 115 loads Net reveal_coretop_i19101.capture_dr_adj_1545: 98 loads Net ip_enable0: 91 loads Net ip_enable1: 76 loads Net secured_signal_1347: 64 loads Net trigger_en[1]_N: 57 loads Net jtaghub_inst.jtdo2_int_m15: 55 loads Net reveal_coretop_i19101.n446: 54 loads Number of warnings: 0 Number of errors: 0 Number of warnings: 0 Number of errors: 0 Design Errors/Warnings No errors or warnings present. IO (PIO) Attributes +---------------------+-----------+-----------+-------+-------+-----------+ | IO Name | Direction | Levelmode | IO | IO | Special | | | | IO_TYPE | REG | DDR | IO Buffer | +---------------------+-----------+-----------+-------+-------+-----------+ | TDI | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | TCK | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | TMS | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | TDO | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[6] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[7] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[5] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[4] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[3] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[2] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[1] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | led[0] | OUTPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | clk_p | INPUT | LVSTLD_II | | | | +---------------------+-----------+-----------+-------+-------+-----------+ | rstn | INPUT | | | | | +---------------------+-----------+-----------+-------+-------+-----------+ Removed logic Block jtaghub_inst/IP_ENABLE_reg[17].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_reg[16].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_reg[15].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_reg[14].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_reg[13].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_reg[12].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_fast_reg[11].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_reg[11].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/IP_ENABLE_fast_reg[3].ff_inst undriven or does not drive anything - clipped. Block jtaghub_inst/jtdo2_int_m15_N_2L1_cZ undriven or does not drive anything - clipped. Block i2 was optimized away. Block i1 was optimized away. Block i11_1_lut was optimized away. Block reveal_coretop_i19101/jtck_N_keep_I_0 was optimized away. Block jtaghub_inst/IP_ENABLE_0_.CN was optimized away. Block jtaghub_inst/OBZ_inst_RNO was optimized away. Block jtaghub_inst/jtagg_u_RNI1T52 was optimized away. Block jtaghub_inst/jtdo2_int_m11_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m11_1_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m8_1_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m11_1_0_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m2_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m2_1_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m5_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m5_1_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m2_bm_cZ was optimized away. Block jtaghub_inst/jtdo2_int_m5_bm_cZ was optimized away. ASIC Components --------------- Instance Name: jtaghub_inst/jtagg_u Type: CONFIG_JTAG_CORE Instance Name: secured_comp_683 Type: EBR_CORE Instance Name: secured_comp_684 Type: EBR_CORE Instance Name: secured_comp_2089 Type: EBR_CORE GSR Usage --------- GSR Component: The Global Set Reset (GSR) resource has been used to implement a global reset of the design. The reset signal used for GSR control is 'jrstn'. GSR Property: The design components with GSR property set to ENABLED will respond to global set reset while the components with GSR property set to DISABLED will not. Components with disabled GSR Property ------------------------------------- These components have the GSR property set to DISABLED. The components will not respond to the reset signal 'jrstn' via the GSR component. Type and number of components of the type: Register = 1035 EBR_CORE = 3 Type and instance name of component: Register : jtaghub_inst.rom_rd_addr_reg[0].ff_inst Register : jtaghub_inst.rom_rd_addr_reg[1].ff_inst Register : jtaghub_inst.rom_rd_addr_reg[2].ff_inst Register : jtaghub_inst.rom_rd_addr_reg[3].ff_inst Register : jtaghub_inst.rom_rd_addr_reg[4].ff_inst Register : jtaghub_inst.rom_rd_addr_reg[5].ff_inst Register : jtaghub_inst.jshift_d1.ff_inst Register : jtaghub_inst.jce1_d1_reg.ff_inst Register : jtaghub_inst.id_enable_reg.ff_inst Register : jtaghub_inst.er1_shift_reg_reg[1].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[2].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[3].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[4].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[5].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[6].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[7].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[8].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[9].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[10].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[11].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[12].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[13].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[14].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[15].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[16].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[17].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[18].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[19].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[20].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[21].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[22].ff_inst Register : jtaghub_inst.er1_shift_reg_reg[23].ff_inst Register : jtaghub_inst.bit_count_reg[0].ff_inst Register : jtaghub_inst.bit_count_reg[1].ff_inst Register : jtaghub_inst.bit_count_reg[2].ff_inst Register : jtaghub_inst.bit_count_reg[3].ff_inst Register : jtaghub_inst.bit_count_reg[4].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[0].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[1].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[2].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[3].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[4].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[5].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[6].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[7].ff_inst Register : jtaghub_inst.IP_ENABLE_fast_reg[8].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[8].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[9].ff_inst Register : jtaghub_inst.IP_ENABLE_reg[10].ff_inst Register : secured_comp_189 Register : secured_comp_190 Register : secured_comp_191 Register : secured_comp_192 Register : secured_comp_193 Register : secured_comp_197 Register : secured_comp_198 Register : secured_comp_205 Register : secured_comp_206 Register : secured_comp_207 Register : secured_comp_208 Register : secured_comp_209 Register : secured_comp_213 Register : secured_comp_214 Register : secured_comp_215 Register : secured_comp_222 Register : secured_comp_223 Register : secured_comp_224 Register : secured_comp_225 Register : secured_comp_226 Register : secured_comp_230 Register : secured_comp_231 Register : secured_comp_232 Register : secured_comp_280 Register : secured_comp_281 Register : secured_comp_284 Register : secured_comp_285 Register : secured_comp_286 Register : secured_comp_287 Register : secured_comp_288 Register : secured_comp_289 Register : secured_comp_290 Register : secured_comp_291 Register : secured_comp_292 Register : secured_comp_293 Register : secured_comp_294 Register : secured_comp_295 Register : secured_comp_296 Register : secured_comp_297 Register : secured_comp_298 Register : secured_comp_299 Register : secured_comp_300 Register : secured_comp_301 Register : secured_comp_302 Register : secured_comp_303 Register : secured_comp_304 Register : secured_comp_305 Register : secured_comp_306 Register : secured_comp_307 Register : secured_comp_308 Register : secured_comp_309 Register : secured_comp_310 Register : secured_comp_311 Register : secured_comp_312 Register : secured_comp_313 Register : secured_comp_314 Register : secured_comp_315 Register : secured_comp_316 Register : secured_comp_317 Register : secured_comp_318 Register : secured_comp_319 Register : secured_comp_381 Register : secured_comp_382 Register : secured_comp_385 Register : secured_comp_386 Register : secured_comp_387 Register : secured_comp_388 Register : secured_comp_389 Register : secured_comp_390 Register : secured_comp_391 Register : secured_comp_392 Register : secured_comp_393 Register : secured_comp_394 Register : secured_comp_395 Register : secured_comp_396 Register : secured_comp_397 Register : secured_comp_398 Register : secured_comp_399 Register : secured_comp_400 Register : secured_comp_401 Register : secured_comp_402 Register : secured_comp_403 Register : secured_comp_404 Register : secured_comp_405 Register : secured_comp_406 Register : secured_comp_407 Register : secured_comp_408 Register : secured_comp_409 Register : secured_comp_410 Register : secured_comp_411 Register : secured_comp_412 Register : secured_comp_413 Register : secured_comp_414 Register : secured_comp_415 Register : secured_comp_416 Register : secured_comp_417 Register : secured_comp_418 Register : secured_comp_419 Register : secured_comp_420 Register : secured_comp_421 Register : secured_comp_422 Register : secured_comp_423 Register : secured_comp_424 Register : secured_comp_425 Register : secured_comp_426 Register : secured_comp_427 Register : secured_comp_428 Register : secured_comp_429 Register : secured_comp_430 Register : secured_comp_431 Register : secured_comp_432 Register : secured_comp_433 Register : secured_comp_434 Register : secured_comp_435 Register : secured_comp_436 Register : secured_comp_458 Register : secured_comp_459 Register : secured_comp_460 Register : secured_comp_461 Register : secured_comp_462 Register : secured_comp_463 Register : secured_comp_464 Register : secured_comp_465 Register : secured_comp_466 Register : secured_comp_467 Register : secured_comp_468 Register : secured_comp_469 Register : secured_comp_470 Register : secured_comp_682 Register : secured_comp_685 Register : secured_comp_686 Register : secured_comp_687 Register : secured_comp_688 Register : secured_comp_689 Register : secured_comp_690 Register : secured_comp_691 Register : secured_comp_692 Register : secured_comp_693 Register : secured_comp_694 Register : secured_comp_695 Register : secured_comp_696 Register : secured_comp_697 Register : secured_comp_698 Register : secured_comp_699 Register : secured_comp_700 Register : secured_comp_701 Register : secured_comp_702 Register : secured_comp_703 Register : secured_comp_704 Register : secured_comp_705 Register : secured_comp_706 Register : secured_comp_707 Register : secured_comp_708 Register : secured_comp_709 Register : secured_comp_710 Register : secured_comp_711 Register : secured_comp_712 Register : secured_comp_713 Register : secured_comp_714 Register : secured_comp_715 Register : secured_comp_716 Register : secured_comp_717 Register : secured_comp_718 Register : secured_comp_719 Register : secured_comp_720 Register : secured_comp_721 Register : secured_comp_722 Register : secured_comp_723 Register : secured_comp_724 Register : secured_comp_725 Register : secured_comp_726 Register : secured_comp_727 Register : secured_comp_728 Register : secured_comp_729 Register : secured_comp_730 Register : secured_comp_731 Register : secured_comp_732 Register : secured_comp_733 Register : secured_comp_734 Register : secured_comp_735 Register : secured_comp_736 Register : secured_comp_737 Register : secured_comp_738 Register : secured_comp_739 Register : secured_comp_740 Register : secured_comp_741 Register : secured_comp_742 Register : secured_comp_743 Register : secured_comp_744 Register : secured_comp_745 Register : secured_comp_746 Register : secured_comp_747 Register : secured_comp_748 Register : secured_comp_749 Register : secured_comp_753 Register : secured_comp_754 Register : secured_comp_755 Register : secured_comp_756 Register : secured_comp_757 Register : secured_comp_758 Register : secured_comp_759 Register : secured_comp_760 Register : secured_comp_761 Register : secured_comp_762 Register : secured_comp_763 Register : secured_comp_764 Register : secured_comp_765 Register : secured_comp_766 Register : secured_comp_767 Register : secured_comp_768 Register : secured_comp_769 Register : secured_comp_773 Register : secured_comp_774 Register : secured_comp_775 Register : secured_comp_776 Register : secured_comp_777 Register : secured_comp_778 Register : secured_comp_779 Register : secured_comp_780 Register : secured_comp_781 Register : secured_comp_782 Register : secured_comp_783 Register : secured_comp_784 Register : secured_comp_785 Register : secured_comp_786 Register : secured_comp_787 Register : secured_comp_788 Register : secured_comp_789 Register : secured_comp_790 Register : secured_comp_791 Register : secured_comp_792 Register : secured_comp_793 Register : secured_comp_794 Register : secured_comp_795 Register : secured_comp_796 Register : secured_comp_797 Register : secured_comp_798 Register : secured_comp_799 Register : secured_comp_800 Register : secured_comp_801 Register : secured_comp_802 Register : secured_comp_803 Register : secured_comp_804 Register : secured_comp_805 Register : secured_comp_806 Register : secured_comp_807 Register : secured_comp_808 Register : secured_comp_809 Register : secured_comp_810 Register : secured_comp_811 Register : secured_comp_812 Register : secured_comp_813 Register : secured_comp_814 Register : secured_comp_815 Register : secured_comp_816 Register : secured_comp_817 Register : secured_comp_818 Register : secured_comp_819 Register : secured_comp_820 Register : secured_comp_821 Register : secured_comp_822 Register : secured_comp_823 Register : secured_comp_824 Register : secured_comp_825 Register : secured_comp_826 Register : secured_comp_827 Register : secured_comp_828 Register : secured_comp_829 Register : secured_comp_830 Register : secured_comp_831 Register : secured_comp_832 Register : secured_comp_833 Register : secured_comp_834 Register : secured_comp_835 Register : secured_comp_836 Register : secured_comp_837 Register : secured_comp_838 Register : secured_comp_839 Register : secured_comp_840 Register : secured_comp_841 Register : secured_comp_842 Register : secured_comp_843 Register : secured_comp_844 Register : secured_comp_845 Register : secured_comp_846 Register : secured_comp_847 Register : secured_comp_848 Register : secured_comp_849 Register : secured_comp_850 Register : secured_comp_851 Register : secured_comp_852 Register : secured_comp_853 Register : secured_comp_854 Register : secured_comp_855 Register : secured_comp_856 Register : secured_comp_857 Register : secured_comp_858 Register : secured_comp_859 Register : secured_comp_860 Register : secured_comp_861 Register : secured_comp_862 Register : secured_comp_863 Register : secured_comp_864 Register : secured_comp_865 Register : secured_comp_866 Register : secured_comp_867 Register : secured_comp_868 Register : secured_comp_869 Register : secured_comp_870 Register : secured_comp_871 Register : secured_comp_872 Register : secured_comp_873 Register : secured_comp_874 Register : secured_comp_875 Register : secured_comp_876 Register : secured_comp_877 Register : secured_comp_878 Register : secured_comp_879 Register : secured_comp_880 Register : secured_comp_881 Register : secured_comp_1310 Register : secured_comp_1311 Register : secured_comp_1312 Register : secured_comp_1313 Register : secured_comp_1314 Register : secured_comp_1315 Register : secured_comp_1316 Register : secured_comp_1317 Register : secured_comp_1318 Register : secured_comp_1319 Register : secured_comp_1320 Register : secured_comp_1321 Register : secured_comp_1322 Register : secured_comp_1326 Register : secured_comp_1327 Register : secured_comp_1328 Register : secured_comp_1329 Register : secured_comp_1330 Register : secured_comp_1331 Register : secured_comp_1332 Register : secured_comp_1333 Register : secured_comp_1334 Register : secured_comp_1335 Register : secured_comp_1339 Register : secured_comp_1340 Register : secured_comp_1341 Register : secured_comp_1342 Register : secured_comp_1343 Register : secured_comp_1344 Register : secured_comp_1345 Register : secured_comp_1346 Register : secured_comp_1347 Register : secured_comp_1348 Register : secured_comp_1349 Register : secured_comp_1350 Register : secured_comp_1351 Register : secured_comp_1355 Register : secured_comp_1356 Register : secured_comp_1357 Register : secured_comp_1358 Register : secured_comp_1359 Register : secured_comp_1360 Register : secured_comp_1361 Register : secured_comp_1362 Register : secured_comp_1363 Register : secured_comp_1364 Register : secured_comp_1365 Register : secured_comp_1366 Register : secured_comp_1367 Register : secured_comp_1368 Register : secured_comp_1369 Register : secured_comp_1370 Register : secured_comp_1371 Register : secured_comp_1372 Register : secured_comp_1373 Register : secured_comp_1374 Register : secured_comp_1375 Register : secured_comp_1376 Register : secured_comp_1377 Register : secured_comp_1378 Register : secured_comp_1379 Register : secured_comp_1380 Register : secured_comp_1381 Register : secured_comp_1382 Register : secured_comp_1383 Register : secured_comp_1384 Register : secured_comp_1388 Register : secured_comp_1389 Register : secured_comp_1390 Register : secured_comp_1391 Register : secured_comp_1392 Register : secured_comp_1393 Register : secured_comp_1394 Register : secured_comp_1395 Register : secured_comp_1396 Register : secured_comp_1400 Register : secured_comp_1404 Register : secured_comp_1405 Register : secured_comp_1406 Register : secured_comp_1407 Register : secured_comp_1408 Register : secured_comp_1409 Register : secured_comp_1410 Register : secured_comp_1411 Register : secured_comp_1412 Register : secured_comp_1413 Register : secured_comp_1414 Register : secured_comp_1415 Register : secured_comp_1416 Register : secured_comp_1417 Register : secured_comp_1418 Register : secured_comp_1419 Register : secured_comp_1420 Register : secured_comp_1421 Register : secured_comp_1422 Register : secured_comp_1423 Register : secured_comp_1424 Register : secured_comp_1425 Register : secured_comp_1426 Register : secured_comp_1427 Register : secured_comp_1428 Register : secured_comp_1429 Register : secured_comp_1430 Register : secured_comp_1434 Register : secured_comp_1435 Register : secured_comp_1439 Register : secured_comp_1440 Register : secured_comp_1441 Register : secured_comp_1442 Register : secured_comp_1443 Register : secured_comp_1444 Register : secured_comp_1445 Register : secured_comp_1446 Register : secured_comp_1447 Register : secured_comp_1448 Register : secured_comp_1449 Register : secured_comp_1450 Register : secured_comp_1451 Register : secured_comp_1452 Register : secured_comp_1453 Register : secured_comp_1454 Register : secured_comp_1455 Register : secured_comp_1471 Register : secured_comp_1472 Register : secured_comp_1473 Register : secured_comp_1474 Register : secured_comp_1475 Register : secured_comp_1476 Register : secured_comp_1477 Register : secured_comp_1478 Register : secured_comp_1479 Register : secured_comp_1480 Register : secured_comp_1481 Register : secured_comp_1482 Register : secured_comp_1483 Register : secured_comp_1484 Register : secured_comp_1485 Register : secured_comp_1486 Register : secured_comp_1487 Register : secured_comp_1488 Register : secured_comp_1489 Register : secured_comp_1490 Register : secured_comp_1491 Register : secured_comp_1492 Register : secured_comp_1493 Register : secured_comp_1494 Register : secured_comp_1495 Register : secured_comp_1496 Register : secured_comp_1497 Register : secured_comp_1498 Register : secured_comp_1499 Register : secured_comp_1500 Register : secured_comp_1501 Register : secured_comp_1502 Register : secured_comp_1503 Register : secured_comp_1504 Register : secured_comp_1505 Register : secured_comp_1506 Register : secured_comp_1507 Register : secured_comp_1508 Register : secured_comp_1509 Register : secured_comp_1546 Register : secured_comp_1547 Register : secured_comp_1548 Register : secured_comp_1552 Register : secured_comp_1553 Register : secured_comp_1554 Register : secured_comp_1555 Register : secured_comp_1567 Register : secured_comp_1568 Register : secured_comp_1569 Register : secured_comp_1573 Register : secured_comp_1574 Register : secured_comp_1575 Register : secured_comp_1576 Register : secured_comp_1577 Register : secured_comp_1595 Register : secured_comp_1596 Register : secured_comp_1597 Register : secured_comp_1601 Register : secured_comp_1602 Register : secured_comp_1603 Register : secured_comp_1604 Register : secured_comp_1605 Register : secured_comp_1653 Register : secured_comp_1654 Register : secured_comp_1657 Register : secured_comp_1658 Register : secured_comp_1659 Register : secured_comp_1660 Register : secured_comp_1661 Register : secured_comp_1662 Register : secured_comp_1663 Register : secured_comp_1664 Register : secured_comp_1665 Register : secured_comp_1666 Register : secured_comp_1667 Register : secured_comp_1668 Register : secured_comp_1669 Register : secured_comp_1670 Register : secured_comp_1671 Register : secured_comp_1672 Register : secured_comp_1673 Register : secured_comp_1674 Register : secured_comp_1675 Register : secured_comp_1676 Register : secured_comp_1677 Register : secured_comp_1678 Register : secured_comp_1679 Register : secured_comp_1680 Register : secured_comp_1681 Register : secured_comp_1682 Register : secured_comp_1683 Register : secured_comp_1684 Register : secured_comp_1685 Register : secured_comp_1686 Register : secured_comp_1687 Register : secured_comp_1688 Register : secured_comp_1689 Register : secured_comp_1690 Register : secured_comp_1691 Register : secured_comp_1692 Register : secured_comp_1760 Register : secured_comp_1761 Register : secured_comp_1764 Register : secured_comp_1765 Register : secured_comp_1766 Register : secured_comp_1767 Register : secured_comp_1768 Register : secured_comp_1769 Register : secured_comp_1770 Register : secured_comp_1771 Register : secured_comp_1772 Register : secured_comp_1773 Register : secured_comp_1774 Register : secured_comp_1775 Register : secured_comp_1776 Register : secured_comp_1777 Register : secured_comp_1778 Register : secured_comp_1779 Register : secured_comp_1780 Register : secured_comp_1781 Register : secured_comp_1782 Register : secured_comp_1783 Register : secured_comp_1784 Register : secured_comp_1785 Register : secured_comp_1786 Register : secured_comp_1787 Register : secured_comp_1788 Register : secured_comp_1789 Register : secured_comp_1790 Register : secured_comp_1791 Register : secured_comp_1792 Register : secured_comp_1793 Register : secured_comp_1794 Register : secured_comp_1795 Register : secured_comp_1796 Register : secured_comp_1797 Register : secured_comp_1798 Register : secured_comp_1799 Register : secured_comp_1800 Register : secured_comp_1801 Register : secured_comp_1802 Register : secured_comp_1803 Register : secured_comp_1804 Register : secured_comp_1805 Register : secured_comp_1806 Register : secured_comp_1807 Register : secured_comp_1808 Register : secured_comp_1809 Register : secured_comp_1810 Register : secured_comp_1811 Register : secured_comp_1812 Register : secured_comp_1813 Register : secured_comp_1814 Register : secured_comp_1815 Register : secured_comp_1830 Register : secured_comp_1831 Register : secured_comp_1832 Register : secured_comp_1833 Register : secured_comp_1834 Register : secured_comp_1835 Register : secured_comp_1836 Register : secured_comp_1837 Register : secured_comp_1838 Register : secured_comp_1839 Register : secured_comp_1840 Register : secured_comp_1841 Register : secured_comp_1842 Register : secured_comp_2088 Register : secured_comp_2090 Register : secured_comp_2091 Register : secured_comp_2092 Register : secured_comp_2093 Register : secured_comp_2094 Register : secured_comp_2095 Register : secured_comp_2096 Register : secured_comp_2097 Register : secured_comp_2098 Register : secured_comp_2099 Register : secured_comp_2100 Register : secured_comp_2101 Register : secured_comp_2102 Register : secured_comp_2103 Register : secured_comp_2104 Register : secured_comp_2105 Register : secured_comp_2106 Register : secured_comp_2107 Register : secured_comp_2108 Register : secured_comp_2109 Register : secured_comp_2110 Register : secured_comp_2111 Register : secured_comp_2112 Register : secured_comp_2113 Register : secured_comp_2114 Register : secured_comp_2115 Register : secured_comp_2116 Register : secured_comp_2117 Register : secured_comp_2118 Register : secured_comp_2119 Register : secured_comp_2120 Register : secured_comp_2121 Register : secured_comp_2122 Register : secured_comp_2123 Register : secured_comp_2124 Register : secured_comp_2125 Register : secured_comp_2126 Register : secured_comp_2127 Register : secured_comp_2128 Register : secured_comp_2129 Register : secured_comp_2130 Register : secured_comp_2131 Register : secured_comp_2132 Register : secured_comp_2133 Register : secured_comp_2134 Register : secured_comp_2135 Register : secured_comp_2136 Register : secured_comp_2137 Register : secured_comp_2138 Register : secured_comp_2139 Register : secured_comp_2140 Register : secured_comp_2141 Register : secured_comp_2142 Register : secured_comp_2143 Register : secured_comp_2144 Register : secured_comp_2145 Register : secured_comp_2146 Register : secured_comp_2147 Register : secured_comp_2148 Register : secured_comp_2149 Register : secured_comp_2150 Register : secured_comp_2151 Register : secured_comp_2152 Register : secured_comp_2153 Register : secured_comp_2154 Register : secured_comp_2155 Register : secured_comp_2156 Register : secured_comp_2157 Register : secured_comp_2158 Register : secured_comp_2159 Register : secured_comp_2160 Register : secured_comp_2161 Register : secured_comp_2162 Register : secured_comp_2163 Register : secured_comp_2164 Register : secured_comp_2165 Register : secured_comp_2166 Register : secured_comp_2167 Register : secured_comp_2168 Register : secured_comp_2169 Register : secured_comp_2170 Register : secured_comp_2171 Register : secured_comp_2172 Register : secured_comp_2173 Register : secured_comp_2174 Register : secured_comp_2175 Register : secured_comp_2176 Register : secured_comp_2177 Register : secured_comp_2178 Register : secured_comp_2179 Register : secured_comp_2180 Register : secured_comp_2181 Register : secured_comp_2182 Register : secured_comp_2183 Register : secured_comp_2184 Register : secured_comp_2185 Register : secured_comp_2186 Register : secured_comp_2187 Register : secured_comp_2188 Register : secured_comp_2189 Register : secured_comp_2190 Register : secured_comp_2191 Register : secured_comp_2192 Register : secured_comp_2193 Register : secured_comp_2194 Register : secured_comp_2195 Register : secured_comp_2196 Register : secured_comp_2197 Register : secured_comp_2198 Register : secured_comp_2199 Register : secured_comp_2200 Register : secured_comp_2201 Register : secured_comp_2202 Register : secured_comp_2203 Register : secured_comp_2204 Register : secured_comp_2205 Register : secured_comp_2206 Register : secured_comp_2207 Register : secured_comp_2208 Register : secured_comp_2209 Register : secured_comp_2210 Register : secured_comp_2211 Register : secured_comp_2212 Register : secured_comp_2213 Register : secured_comp_2214 Register : secured_comp_2215 Register : secured_comp_2216 Register : secured_comp_2217 Register : secured_comp_2218 Register : secured_comp_2219 Register : secured_comp_2220 Register : secured_comp_2221 Register : secured_comp_2222 Register : secured_comp_2223 Register : secured_comp_2224 Register : secured_comp_2225 Register : secured_comp_2226 Register : secured_comp_2227 Register : secured_comp_2228 Register : secured_comp_2229 Register : secured_comp_2230 Register : secured_comp_2231 Register : secured_comp_2232 Register : secured_comp_2233 Register : secured_comp_2234 Register : secured_comp_2235 Register : secured_comp_2236 Register : secured_comp_2237 Register : secured_comp_2238 Register : secured_comp_2239 Register : secured_comp_2240 Register : secured_comp_2241 Register : secured_comp_2242 Register : secured_comp_2243 Register : secured_comp_2244 Register : secured_comp_2245 Register : secured_comp_2246 Register : secured_comp_2247 Register : secured_comp_2248 Register : secured_comp_2249 Register : secured_comp_2250 Register : secured_comp_2251 Register : secured_comp_2252 Register : secured_comp_2253 Register : secured_comp_2254 Register : secured_comp_2255 Register : secured_comp_2256 Register : secured_comp_2257 Register : secured_comp_2258 Register : secured_comp_2562 Register : secured_comp_2563 Register : secured_comp_2567 Register : secured_comp_2568 Register : secured_comp_2569 Register : secured_comp_2573 Register : secured_comp_2574 Register : secured_comp_2575 Register : secured_comp_2576 Register : secured_comp_2577 Register : secured_comp_2578 Register : secured_comp_2579 Register : secured_comp_2580 Register : secured_comp_2581 Register : secured_comp_2582 Register : secured_comp_2583 Register : secured_comp_2584 Register : secured_comp_2585 Register : secured_comp_2586 Register : secured_comp_2587 Register : secured_comp_2588 Register : secured_comp_2589 Register : secured_comp_2590 Register : secured_comp_2591 Register : secured_comp_2592 Register : secured_comp_2593 Register : secured_comp_2594 Register : secured_comp_2595 Register : secured_comp_2596 Register : secured_comp_2597 Register : secured_comp_2598 Register : secured_comp_2599 Register : secured_comp_2600 Register : secured_comp_2601 Register : secured_comp_2602 Register : secured_comp_2603 Register : secured_comp_2607 Register : secured_comp_2608 Register : secured_comp_2609 Register : secured_comp_2610 Register : secured_comp_2611 Register : secured_comp_2612 Register : secured_comp_2613 Register : secured_comp_2614 Register : secured_comp_2615 Register : secured_comp_2616 Register : secured_comp_2620 Register : secured_comp_2621 Register : secured_comp_2622 Register : secured_comp_2626 Register : secured_comp_2627 Register : secured_comp_2628 Register : secured_comp_2629 Register : secured_comp_2630 Register : secured_comp_2631 Register : secured_comp_2641 Register : secured_comp_2642 Register : secured_comp_2643 Register : secured_comp_2644 Register : secured_comp_2645 Register : secured_comp_2646 Register : secured_comp_2647 Register : secured_comp_2648 Register : secured_comp_2649 Register : secured_comp_2650 Register : secured_comp_2654 Register : secured_comp_2655 Register : secured_comp_2656 Register : secured_comp_2657 Register : secured_comp_2658 Register : secured_comp_2659 Register : secured_comp_2660 Register : secured_comp_2661 Register : secured_comp_2662 Register : secured_comp_2663 Register : secured_comp_2664 Register : secured_comp_2665 Register : secured_comp_2666 Register : secured_comp_2667 Register : secured_comp_2668 Register : secured_comp_2675 Register : secured_comp_2676 Register : secured_comp_2677 Register : secured_comp_2678 Register : secured_comp_2679 Register : secured_comp_2680 Register : secured_comp_2681 Register : secured_comp_2682 Register : secured_comp_2683 Register : secured_comp_2684 Register : secured_comp_2688 Register : secured_comp_2695 Register : secured_comp_2696 Register : secured_comp_2697 Register : secured_comp_2698 Register : secured_comp_2699 Register : secured_comp_2700 Register : secured_comp_2704 Register : secured_comp_2705 Register : secured_comp_2706 Register : secured_comp_2707 Register : secured_comp_2708 Register : secured_comp_2709 Register : secured_comp_2710 Register : secured_comp_2711 Register : secured_comp_2712 Register : secured_comp_2713 Register : secured_comp_2714 Register : secured_comp_2715 Register : secured_comp_2716 Register : secured_comp_2720 Register : secured_comp_2721 Register : secured_comp_2722 Register : secured_comp_2723 Register : secured_comp_2724 Register : secured_comp_2725 Register : secured_comp_2726 Register : secured_comp_2727 Register : secured_comp_2728 Register : secured_comp_2729 Register : secured_comp_2736 Register : secured_comp_2737 Register : secured_comp_2738 Register : secured_comp_2739 Register : secured_comp_2740 Register : secured_comp_2741 Register : secured_comp_2742 Register : secured_comp_2743 Register : secured_comp_2744 Register : secured_comp_2745 Register : secured_comp_2746 Register : secured_comp_2747 Register : secured_comp_2748 Register : secured_comp_2749 Register : secured_comp_2750 Register : secured_comp_2751 Register : secured_comp_2752 Register : secured_comp_2753 Register : secured_comp_2754 Register : secured_comp_2755 Register : secured_comp_2756 Register : secured_comp_2757 Register : secured_comp_2758 Register : secured_comp_2759 Register : secured_comp_2760 Register : secured_comp_2761 Register : secured_comp_2762 Register : secured_comp_2763 Register : secured_comp_2764 Register : trigger1_I_0_2.ff_inst Register : trigger2_I_0_2.ff_inst Register : cntBits_23__I_26.ff_inst Register : cntBits_23__I_14.ff_inst Register : cntBits_i27.ff_inst Register : cntBits_i26.ff_inst Register : cntBits_i25.ff_inst Register : cntBits_i24.ff_inst Register : cntBits_23__I_0_2.ff_inst Register : cntBits_23__I_4.ff_inst Register : cntBits_23__I_5.ff_inst Register : cntBits_23__I_6.ff_inst Register : cntBits_23__I_7.ff_inst Register : cntBits_23__I_8.ff_inst Register : cntBits_23__I_9.ff_inst Register : cntBits_23__I_10.ff_inst Register : cntBits_23__I_11.ff_inst Register : cntBits_23__I_12.ff_inst Register : cntBits_23__I_15.ff_inst Register : cntBits_23__I_16.ff_inst Register : cntBits_23__I_17.ff_inst Register : cntBits_23__I_18.ff_inst Register : cntBits_23__I_19.ff_inst Register : cntBits_23__I_20.ff_inst Register : cnt2bits_23__I_49.ff_inst Register : cntBits_23__I_21.ff_inst Register : cntBits_23__I_22.ff_inst Register : cntBits_23__I_23.ff_inst Register : cntBits_23__I_24.ff_inst Register : cntBits_23__I_25.ff_inst Register : cnt2bits_23__I_48.ff_inst Register : cnt2bits_23__I_47.ff_inst Register : cnt2bits_23__I_46.ff_inst Register : cnt2bits_23__I_45.ff_inst Register : cnt2bits_23__I_44.ff_inst Register : cnt2bits_23__I_43.ff_inst Register : cnt2bits_23__I_42.ff_inst Register : cnt2bits_23__I_41.ff_inst Register : cnt2bits_23__I_40.ff_inst Register : cnt2bits_23__I_39.ff_inst Register : cnt2bits_23__I_38.ff_inst Register : cnt2bits_23__I_37.ff_inst Register : cnt2bits_23__I_36.ff_inst Register : cnt2bits_23__I_35.ff_inst Register : cnt2bits_23__I_34.ff_inst Register : cnt2bits_23__I_33.ff_inst Register : cnt2bits_23__I_32.ff_inst Register : cnt2bits_23__I_31.ff_inst Register : cnt2bits_23__I_30.ff_inst Register : cnt2bits_23__I_29.ff_inst Register : cnt2bits_23__I_28.ff_inst Register : cnt2bits_23__I_27.ff_inst Register : cnt2bits_23__I_0_2.ff_inst Register : cnt2bits_e3_e3_i0_i24.ff_inst Register : cnt2bits_e3_e3_i0_i25.ff_inst Register : cnt2bits_e3_e3_i0_i26.ff_inst Register : cnt2bits_e3_e3_i0_i27.ff_inst Register : cntBits_23__I_13.ff_inst EBR_CORE : secured_comp_683 EBR_CORE : secured_comp_684 EBR_CORE : secured_comp_2089 Constraint Summary ------------------ Total number of constraints: 13 Total number of constraints dropped: 0 Run Time and Memory Usage ------------------------- Total CPU Time: 5 secs Total REAL Time: 5 secs Peak Memory Usage: 612 MB Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2023 Lattice Semiconductor Corporation, All rights reserved.