<?xml version="1.0" encoding="UTF-8"?>
<RadiantProject version="4.2" radiant="3.2.0.18.0" title="crosslinknx_demo" device="LIFCL-40-8BG400C" performance_grade="8_High-Performance_1.0V" default_implementation="impl_1">
    <Options/>
    <Implementation title="impl_1" dir="impl_1" description="impl_1" synthesis="synplify" default_strategy="Strategy1">
        <Options/>
        <Source name="crosslinknx_demo/crosslinknx_demo.v" type="Verilog" type_short="Verilog">
            <Options/>
        </Source>
    </Implementation>
    <Strategy name="Strategy1" file="crosslinknx_demo1.sty"/>
</RadiantProject>
