Description:
Timing Engine in Radiant 3.11 has no timing report analysis about clock skew from same source to destination clock. This enhancement has already been updated and reported on Radiant 3.2 SP1.
Solution:
It can be check using the Report and Timing Analyzer tool.
Example:
Path Begin : LIFCL_MEM.pdp16k.PDP16K_MODE_inst/DO35 (EBR_CORE_EBR_CORE_R10C47)
Path End : r_offset_reg[1].ff_inst/CE (SLICE_R17C46B)
Source Clock : tx1_byte_clk (R)
Destination Clock: tx1_byte_clk (R)
Logic Level : 2
Delay Ratio : 22.4% (route), 77.6% (logic)
Clock Skew : -0.092 ns
Setup Constraint : 5.333 ns
Path Slack : 0.415 ns (Passed)