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ID: 6507
Case Type: faq
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Lattice Diamond: Why are there no paths analyzed for MAXDELAY constraint. How to use MAXDELAY constraints?

The MAXDELAY constraint used in the design might not be connected, or they are on a different clock. 

Diamond STA won't analysis on different clock domains unless they are related by clkskewdiff 

For Example, if two cells are in different clock domains: 
MAXDELAY FROM CELL "A" TO CELL "B" 18 ns; 
CLKSKEWDIFF CLKPORT "clk1" CLKPORT "clk2" 0 ns; 

For Example, if two cells are in the same clock domain: 
MAXDELAY FROM CELL "A" TO CELL "B" 18 ns;