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ID: 5424
Case Type: faq
Category: Implementation
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Why does the connection type is still "pad-pin"declared in Clarity even if the signal does not go to I/O pins but rather go to internal logic?

Our Clarity Designer builder for modules and IP such as cmos-to-dphy is intended to be stand alone and thus it automatically generates a pad-pin type of connection. It is already a known issue when this IP module is used or connected as part of the bigger design. This, however, does not disrupt the functionality due to the misleading connection type.
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