iCE40: What is the state of flip-flops during Power On Reset (POR) in iCE40 devices?
The global reset control signal connects to all Programmable Logic Blocks (PLBs) and Programmable Inputs/Outputs (PIOs) flip-flops on the iCE40 device. The global reset signal is
automatically asserted throughout the configuration process, forcing all flip-flops to their defined wake-up state.
For
PLB flip-flops, the wake-up state is always reset, regardless of the PLB flip-flop primitive used in the application.