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ID: 242
Case Type: faq
Category: Architecture
Related To: Power Sequence
Family: MachXO

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What is the detailed power up sequence for a MachXO device?

The power up sequence for the MachXO is as follows:

  1. IOs trisate with a weak pull up
  2. Reset internal circuitry asserted
  3. Vcc and Vccaux reach min recommended datasheet levels
  4. POR (Power On Reset) for internal circuitry deasserted
  5. Device does a test to ensure Flash to SRAM transfer will be reliable
  6. Flash to SRAM transfer
  7. SRAM Done bit set
  8. Device wakeup sequence including GSR
  9. Device is active

Be aware that there is hysteresis above the POR release point for Vcc and Vccaux. There are no specific time requirements above POR, however it will take some time to perform the FLASH test and transfer to SRAM. 

Additionally, there are initialization requirements for Vccio relative to the timing of Vcc and Vccaux.

See the MachXO datasheet for more information about power up sequencing and configuration modes.