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ID: 1962
Case Type: faq
Category: Architecture
Related To: Generic DDR
Family: MachXO2

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What is the delay value on each step for the MachXO2 input data delay DELAYE module?

Each delay step on the DELAYE module should generate ~105ps of delay. You can find more information on the DELAYE usage in the MachXO2 Implementing High-Speed Interfaces technote TN1203