Lattice Solutions

Reference Design

Hand Gesture Detection

Implements a low power AI based system to detect hand gestures using an IR image sensor

iCE40 UltraPlus 

Machine Learning/AI, Gesture Detection, Lattice sensAI 

IP Core

Timer/Counter IP Core

The Lattice Semiconductor Timer/Counter IP is used to track timeouts in the system, and it generates an interrupt to the CPU when a timeout is detected.

Certus-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, CertusPro-NX, CrossLink, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 LP/HX, iCE40 Ultra / UltraLite, iCE40 UltraPlus, LatticeECP2/M, LatticeECP3, LatticeSC/M, LatticeXP2, Mach-NX, MachXO, MachXO2, MachXO3, MachXO3D, MachXO5-NX 

AMBA, Lattice Propel, Lattice Diamond, Lattice Radiant, APB, AHB-Lite, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

Reference Design

Single Wire Signal Aggregation Reference Design

Single Wire Signal Aggregation Reference Design is configurable, the number of I2C/I2S busses and GPIOs and single wire protocol packet length can be adjusted.

iCE40 UltraPlus 

Bus Controllers, Signal Aggregation, Single Wire, Defense 

Reference Design

Key Phrase Detection

Continuous searches for a key phrase utterance via a digital MEMS microphone. Can be re-configured to work with any trained word or phrase.

iCE40 UltraPlus 

Audio AI, Machine Learning/AI, Lattice sensAI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 

Reference Design

Human Presence Detection

Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.

iCE40 UltraPlus 

Machine Learning/AI, Object Detection, Lattice sensAI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense 

IP Core

Convolutional Neural Network (CNN) Compact Accelerator

Implement AI solutions with CNNs or BNNs that have power consumption in the mW range. Works with Lattice Neural Network Compiler software tool.

iCE40 UltraPlus 

Machine Learning/AI, Lattice sensAI, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs 

IP Core

I3C Controller IP Core

I3C Controller IP Core is a two-wire, bi-directional serial bus designed for use with many sensor secondary devices controlled by a single I3C controller.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X 

I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle 

IP Core

I3C Target IP Core

I3C Target IP Core enables greater than 10-fold speed improvements, more effective bus power management, and backward compatibility with I2C devices.

CertusPro-NX, CrossLink-NX, Certus-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X 

I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle 

IP Core

USB 2.0 Device with FIFO Interface (USB20HF)

USB20HF IP Core provides FIFO & ULPI interface. It supports High Speed and Full Speed functionality for 15 IN/OUT endpoints.

CrossLink-NX, iCE40 UltraPlus, MachXO2 

FMC, Data Communication, Camera, ULPI, USB2, FIFO 

Reference Design

8N1 UART Transceiver Reference Design

8-bit data, no parity, and 1 stop bit Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel and parallel to serial conversions on data characters received from a peripheral device or CPU

iCE40 UltraPlus, MachXO2 

UART, Bus Controllers, TOR Switch 

Reference Design

Generic Soft SPI Master Controller Reference Design

Provides an interface between a generic processor with parallel bus interface and external SPI devices.

MachXO2, MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 

SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 

Reference Design

Soft I2C Bus Master

Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3, Mach-NX 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 

Reference Design

Soft I2C Slave Peripheral

Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 

IP Core

GPIO IP Core

General Purpose Input/Output (GPIO) peripheral Soft IP is designed to control GPIOs via LMMI or APB.

CertusPro-NX, Certus-NX, CrossLink-NX, Mach-NX, iCE40 UltraPlus, MachXO5-NX, Avant-E, Avant-G, Avant-X 

GPIO Control, APB, Bus Controllers, TOR Switch, Automotive 

IP Core

UART 16550 IP Core

​​Lattice UART16550 IP Core is designed for use in serial communication, supporting the RS-232, RS-422, RS-485, and Electronic Industries Association (EIA) standards, among others.​

iCE40 UltraPlus, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

Bus Controllers, UART, TOR Switch, Guidance Systems, Automotive, Space 

Reference Design

PDM Microphone Aggregation

Aggregate up to 8 PDM microphones and connection to a processor over I2S or SPI with no impact in audio quality. Ideal for beam-forming. PCM output at 48HKz.

iCE40 UltraPlus 

Beam Forming, I2S, Microphone, PDM, Signal Aggregation, SPI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs 

Reference Design

Image Sensor Bridge

Interfaces a CMOS camera to a Digital Video Port (DVP) for a low-power low-footprint solution.

iCE40 UltraPlus 

DVP, Parallel Video, Video Bridge, Video Tx/Rx, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense 

Reference Design

Infrared Remote Tx/Rx Reference Designs

Implements an interface to IR receive and/or IR transmit. This includes PWM (pulse width modulation) timing and protocol conversion to an SPI /I2C bus

iCE40 LP/HX, iCE40 Ultra / UltraLite, iCE40 UltraPlus 

I2C, Infrared LED, PWM, SPI, UAVs 

Reference Design

Long Range (LoRa) Wireless

Implement a LoRa compliant device using a tiny iCE40 UltraPlus FPGA, for low-power, low-footprint wireless communication over miles

iCE40 UltraPlus 

I2C, LoRa, RISC-V, Soft Processor, SPI 

Reference Design

Graphics Acceleration

Enables a processor to save power in sleep mode while the low-power iCE40 UltraPlus drives a mobile DSI display, and monitors for wake-up signals.

iCE40 UltraPlus 

DSI, I2C, LCD panel, SPI