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  • Lattice Sentry I2C Filter IP Core

    IP Core

    Lattice Sentry I2C Filter IP Core

    SMBus relay with I2C filter and provides 4 interface to protect malicious traffic.
    Mach-NX, MachXO3D 
    I2C, AHB-Lite, AHB-L, Lattice Propel, Lattice Sentry, Security, AMBA, FPGA, SMBus, RoT, Lattice Diamond, Lattice Sentry PFR IP Package 
    Lattice Sentry I2C Filter IP Core
  • Lattice Sentry SMBus Mailbox IP Core

    IP Core

    Lattice Sentry SMBus Mailbox IP Core

    SMBus, a two-wire interface that support fairness arbitration and compatible with AHB-Lite specification. Target devices are Mach-NX and MachXO3D.
    MachXO3D, Mach-NX 
    I2C, AHB-L, Lattice Propel, Lattice Sentry, Security, SMBus, RoT, RTL, Lattice Sentry PFR IP Package 
    Lattice Sentry SMBus Mailbox IP Core
  • Lattice Sentry Root of Trust Reference Design for MachXO3D

    Reference Design

    Lattice Sentry Root of Trust Reference Design for MachXO3D

    This design utilizes Lattice Sentry IP to help you develop and test a complete NIST 800-193-compliant PFR solution. You can modify to suit your specific needs.
    MachXO3D 
    NIST, RISC-V, Lattice Propel, Lattice Sentry, Security, Defense 
    Lattice Sentry Root of Trust Reference Design for MachXO3D
  • Lattice Sentry ESB Mux IP Core for MachXO3D

    IP Core

    Lattice Sentry ESB Mux IP Core for MachXO3D

    Propel IP Module for Lattice Sentry: Enables access the MachXO3D embedded security block (ESB) simultaneously with internal crytographic operations
    MachXO3D 
    AMBA, APB, Security, Lattice Sentry PFR IP Package, Lattice Sentry, Lattice Propel 
    Lattice Sentry ESB Mux IP Core for MachXO3D
  • Lattice Sentry I2C Monitor IP Core for MachXO3D

    IP Core

    Lattice Sentry I2C Monitor IP Core for MachXO3D

    Propel IP Module for Lattice Sentry: Monitors traffic on I2C bus to identify and block potentially illegal traffic.
    MachXO3D 
    APB, AMBA, Lattice Sentry PFR IP Package, Security, I2C, Lattice Propel, Lattice Sentry 
    Lattice Sentry I2C Monitor IP Core for MachXO3D
  • Lattice Sentry QSPI Monitor IP Core for MachXO3D

    IP Core

    Lattice Sentry QSPI Monitor IP Core for MachXO3D

    Propel IP Module for Lattice Sentry: Monitors traffic on SPI/QSPI bus to identify and block potentially illegal traffic.
    MachXO3D 
    APB, SPI, Security, Lattice Sentry PFR IP Package, Lattice Sentry, Lattice Propel, Defense 
    Lattice Sentry QSPI Monitor IP Core for MachXO3D
  • Lattice Sentry QSPI Streamer IP Core for MachXO3D

    IP Core

    Lattice Sentry QSPI Streamer IP Core for MachXO3D

    Propel IP Module for Lattice Sentry: Provides fast SPI memory access for firmware authentication as part fo Platform Root of Trust operation
    MachXO3D 
    AMBA, Lattice Propel, APB, Lattice Sentry PFR IP Package, SPI, Lattice Sentry, Security 
    Lattice Sentry QSPI Streamer IP Core for MachXO3D
  • RISC-V MC CPU IP Core

    IP Core

    RISC-V MC CPU IP Core

    Propel IP Module: 32-bit RISC-V processor core with optional Timer and PIC sub-modules, connects via AHB-Lite bus to other Propel IP modules and more.
    MachXO3D, Certus-NX, CrossLink-NX, Avant-E 
    AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive 
    RISC-V MC CPU IP Core
  • DC-SCM LVDS Tunneling Protocol and Interface IP Core

    IP Core

    DC-SCM LVDS Tunneling Protocol and Interface IP Core

    LTPI IP Core is an Open Computer Project Data Center – Secure Control Module Standards compatible solution which is introduced in the DC-SCM 2.0 Specification.
    MachXO3, MachXO3D 
    CRC, LVDS, LTPI, AMBA, APB, Lattice Diamond, Lattice Radiant 
    DC-SCM LVDS Tunneling Protocol and Interface IP Core
  • LVDS Tunneling Protocol and Interface Reference Design

    Reference Design

    LVDS Tunneling Protocol and Interface Reference Design

    The DC-SCM 2.0 LTPI Reference Design provides multiple solution compliant with DC-SCM 2.0 with a standardized DC-SCI and aggregating multiple data channels.
    MachXO3, MachXO3D 
    CRC, LVDS, I2C, GPIO, UART, LTPI, AMBA, APB, Lattice Diamond, Lattice Propel 
    LVDS Tunneling Protocol and Interface Reference Design
  • I2C to APB Bridge Reference Design

    Reference Design

    I2C to APB Bridge Reference Design

    With support APB read / write capability, the I2C to APB Bridge Reference Design converts external I2C Master into APB Master transaction.
    MachXO2, MachXO3, MachXO3D 
    I2C, APB, AMBA, AHB 
    I2C to APB Bridge Reference Design
  • AHB-Lite Interconnect Module

    IP Core

    AHB-Lite Interconnect Module

    Propel IP Module: Fully parameterized interconnect for AHB-Lite systems - bus widths of 8 to 1024 bits, address widths up to 32 bits, 32 masters and 32 slaves.
    MachXO3D, Certus-NX, CrossLink-NX, Mach-NX 
    AMBA, Lattice Propel, AHB-Lite, TOR Switch, Automotive 
    AHB-Lite Interconnect Module
  • AHB-Lite to APB Bridge Module

    IP Core

    AHB-Lite to APB Bridge Module

    Propel IP Module: Bridges high-speed AHB-lite to low-power APB. Data bus widths up to 32 bits. Address width up to 32 bits.
    MachXO3D, Certus-NX, CrossLink-NX, Mach-NX 
    AMBA, APB, Lattice Propel, AHB-Lite, TOR Switch, Automotive 
    AHB-Lite to APB Bridge Module
  • APB Interconnect Module

    IP Core

    APB Interconnect Module

    Propel IP Module: Fully parameterized to connect up to 32 APB bus masters and 32 slaves. Data bus width up to 32 bits. Address width up to 32 bits.
    MachXO3D, Certus-NX, CrossLink-NX, Mach-NX 
    AMBA, APB, Lattice Propel, Automotive 
    APB Interconnect Module
  • EFB Module

    IP Core

    EFB Module

    Propel IP Module: Implements the Embedded Function Block (EFB) in MachXO3D, including I2C, Configuration Blocks and User Flash Memory with an APB Interface.
    MachXO3D 
    AMBA, Embedded FPGA Flash, I2C, APB, Lattice Propel, TOR Switch 
    EFB Module
  • Multi-Channel Motor Control with Predictive Maintenance

    Reference Design

    Multi-Channel Motor Control with Predictive Maintenance

    This design incorporates a RISC-V CPU and processing subsystem supporting multi-channel Motor Control with Predictive Maintenance.
    Certus-NX, MachXO3D 
    RISC-V, Lattice Automate, Automotive 
    Multi-Channel Motor Control with Predictive Maintenance
  • RISC-V SM CPU IP Core

    IP Core

    RISC-V SM CPU IP Core

    The RISC-V SM CPU IP processes data and instructions while considering the external interrupts. The CPU core supports the RV32I instruction set, external interrupt, and debug feature, which is JTAG – IEEE 1149.1 compliant.
    Certus-NX, CrossLink-NX, MachXO3D, MachXO3, MachXO2, Avant-E 
    AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive 
    RISC-V SM CPU IP Core
  • System Memory Module

    IP Core

    System Memory Module

    Propel IP Module: Configures Embedded Block RAMs or Distributed Memory interfaces and connects to the AHB-Lite bus.
    MachXO3D, Certus-NX, CrossLink-NX, Mach-NX 
    Embedded Ram, AHB-Lite, AMBA, Lattice Propel, TOR Switch, Automotive 
    System Memory Module
  • UART IP Core

    IP Core

    UART IP Core

    Propel IP Module: Similar to NS16450 UART for serial communication supporting RS-232.
    MachXO3D, Certus-NX, CrossLink-NX, Mach-NX 
    APB, RS-232, AMBA, Lattice Propel, UART, TOR Switch, Defense, Automotive 
    UART IP Core
  • MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption

    Reference Design

    MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption

    Shows how to use the MachXO3D Embedded Security Block (ESB) to implement AES128 or AES256 encryption or decryption.
    MachXO3D 
    Encryption, AES, Security, Defense 
    MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption
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