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  • Embedded Vision Development Kit

    Board

    Embedded Vision Development Kit

    Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
    Embedded Vision Development Kit
  • Embedded Vision Development Kit

    Board

    Embedded Vision Development Kit

    Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
    Embedded Vision Development Kit
  • USB3-GbE VIP IO Board

    Board

    USB3-GbE VIP IO Board

    Output board for Video Interface Platform (VIP) and Embedded Vision Development Kit - adds video over USB 3.0 and Gigabit Ethernet.
    USB3-GbE VIP IO Board
  • USB3-GbE VIP IO Board

    Board

    USB3-GbE VIP IO Board

    Output board for Video Interface Platform (VIP) and Embedded Vision Development Kit - adds video over USB 3.0 and Gigabit Ethernet.
    USB3-GbE VIP IO Board
  • ECP5 Evaluation Board

    Board

    ECP5 Evaluation Board

    Evaluation and development for ECP5-5G FPGA - 85K LUTs. Includes generous IO access and easy expansion to PMOD, Arduino, RaspberryPI, SERDES interface and more
    ECP5 Evaluation Board
  • ECP5 Evaluation Board

    Board

    ECP5 Evaluation Board

    Evaluation and development for ECP5-5G FPGA - 85K LUTs. Includes generous IO access and easy expansion to PMOD, Arduino, RaspberryPI, SERDES interface and more
    ECP5 Evaluation Board
  • Human Face Identification AI

    Reference Design

    Human Face Identification AI

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
    Human Face Identification AI
  • Human Face Identification AI

    Reference Design

    Human Face Identification AI

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
    Human Face Identification AI
  • Object Counting AI

    Reference Design

    Object Counting AI

    An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine
    Object Counting AI
  • Object Counting AI

    Reference Design

    Object Counting AI

    An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine
    Object Counting AI
  • Convolutional Neural Network (CNN) Accelerator IP

    IP Core

    Convolutional Neural Network (CNN) Accelerator IP

    Implement AI solutions with CNNs from common or custom networks. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.
    Convolutional Neural Network (CNN) Accelerator IP
  • Convolutional Neural Network (CNN) Accelerator IP

    IP Core

    Convolutional Neural Network (CNN) Accelerator IP

    Implement AI solutions with CNNs from common or custom networks. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.
    Convolutional Neural Network (CNN) Accelerator IP
  • Helion IONOS Image Signal Processing IP Portfolio

    IP Core

    Helion IONOS Image Signal Processing IP Portfolio

    Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.
    Helion IONOS Image Signal Processing IP Portfolio
  • Helion IONOS Image Signal Processing IP Portfolio

    IP Core

    Helion IONOS Image Signal Processing IP Portfolio

    Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.
    Helion IONOS Image Signal Processing IP Portfolio
  • Lattice Image Signal Processing Demo

    Demo

    Lattice Image Signal Processing Demo

    Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.
    Lattice Image Signal Processing Demo
  • Lattice Image Signal Processing Demo

    Demo

    Lattice Image Signal Processing Demo

    Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.
    Lattice Image Signal Processing Demo
  • Lattice Image Signal Processing Reference Design

    Reference Design

    Lattice Image Signal Processing Reference Design

    Configure an ECP5 FPGA-based ISP solution tailored to your Industrial, Medical, and Automotive application.
    Lattice Image Signal Processing Reference Design
  • Lattice Image Signal Processing Reference Design

    Reference Design

    Lattice Image Signal Processing Reference Design

    Configure an ECP5 FPGA-based ISP solution tailored to your Industrial, Medical, and Automotive application.
    Lattice Image Signal Processing Reference Design
  • Human Counting AI Demo

    Demo

    Human Counting AI Demo

    Human upper-body detection and counting demonstration utilizes Lattice’s ECP5 FPGA and a Convolutional Neural Network (CNN) acceleration engine
    Human Counting AI Demo
  • Human Counting AI Demo

    Demo

    Human Counting AI Demo

    Human upper-body detection and counting demonstration utilizes Lattice’s ECP5 FPGA and a Convolutional Neural Network (CNN) acceleration engine
    Human Counting AI Demo
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