Lattice Solutions

IP Core

FFT Compiler IP Core

The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

Data Communication, DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

FIR Filter Generator IP Core

This IP core is a widely configurable, multi-channel FIR filter, implemented using high performance sysDSP™ blocks available in Lattice devices.

ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

​​JESD204B IP Core​

​​The Lattice JESD204B IP Core is a high-speed serial interface used between data converters, and the FPGA device to replace traditional interfaces.​

ECP5 / ECP5-5G, LatticeECP3, CertusPro-NX 

ADC/DAC, DSP, SDR 

IP Core

PCI Express x1, x4 Root Complex Lite IP Core

Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M 

PCIe, Guidance Systems, Automotive, PCIe Bundle, SDR 

IP Core

ML-KEM-512/768/1024 (CRYSTALS-Kyber), Balanced (XIP6110B)

ML-KEM-512/768/1024 is an IP core for post-quantum Key Encapsulation Mechanism (KEM), optimized for a good balance between speed and resource requirements.

Avant-E, Avant-G, Avant-X, CertusPro-NX, ECP5 / ECP5-5G 

Encryption, NIST, Public/Private Key, Security, SDR 

IP Core

Timer/Counter IP Core

The Lattice Semiconductor Timer/Counter IP is used to track timeouts in the system, and it generates an interrupt to the CPU when a timeout is detected.

Certus-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, CertusPro-NX, CrossLink, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 LP/HX, iCE40 Ultra / UltraLite, iCE40 UltraPlus, LatticeECP2/M, LatticeECP3, LatticeSC/M, LatticeXP2, Mach-NX, MachXO, MachXO2, MachXO3, MachXO3D, MachXO5-NX, Certus-N2 

AMBA, Lattice Propel, Lattice Diamond, Lattice Radiant, APB, AHB-Lite, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

IP Core

AXI4 to APB Bridge Module

The Lattice Semiconductor AXI4 to APB Bridge Module provides an interface between the high-speed AXI4 and APB.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

APB, AXI4, Lattice Avant, Lattice Propel 

IP Core

AXI4 to AHB-Lite Bridge Module

Lattice Semiconductor AXI4 to AHB-Lite Bridge Module provides an interface between the high-speed AXI4 and AHB-Lite.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

AHB-L, AHB-Lite, AXI4, Lattice Avant, Lattice Propel 

IP Core

AHB-Lite to AXI4 Bridge IP Core

The Lattice AHB-Lite to AXI4 Bridge IP Core is used for interfacing one AHB-Lite Manager and one AXI4 Subordinate.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

AHB-L, AHB-Lite, AXI4, Lattice Avant 

IP Core

AXI4 Interconnect Module

AXI4 Interconnect is a flexible, versatile, and easy-to-use IP with high-performance and low-latency interconnect fabric for AMBA 4 AXI/AXI-lite based systems.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

AMBA, AXI4, AXI, AXI-Lite Interface, Lattice Avant 

IP Core

Video Scaler IP Core

The Lattice Video Scaler IP Core is used to scale up or scale down the resolution of a video stream.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3, LatticeXP2 

Lattice Drive, AXI, AXI-Lite Interface, Video Scaling, Embedded Ram, DSP, DSP Bundle 

Reference Design

Human Face Identification Reference Design

Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.

ECP5 / ECP5-5G, CertusPro-NX, CrossLink-NX 

Object Detection, Object Identification, Lattice sensAI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs 

Reference Design

Object Counting AI

An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine

ECP5 / ECP5-5G, CrossLink-NX 

Machine Learning/AI, Lattice sensAI, Object Counting, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Automotive 

IP Core

Convolutional Neural Network (CNN) Accelerator IP

Implement AI solutions with CNNs from common or custom networks. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.

ECP5 / ECP5-5G 

Machine Learning/AI, Lattice sensAI, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense 

IP Core

Helion IONOS Image Signal Processing IP Portfolio

Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.

MachXO, LatticeXP2, LatticeECP3, CrossLink, ECP5 / ECP5-5G, CrossLink-NX 

HDR, Image Processing, Video Tx/Rx, Lattice mVision, Automotive 

IP Core

SPI Sub IP Core

The SPI Sub IP Core is a versatile, efficient solution for SPI communication between an FPGA and a microcontroller, SoC, or another FPGA.

Avant-E, Avant-G, Avant-X, MachXO5-NX, CertusPro-NX, Certus-NX, MachXO3, ECP5 / ECP5-5G 

AXI, SPI 

IP Core

Tri-Speed Ethernet MAC IP Core

The TSEMAC IP core have the logic, interfacing & clocking infra to ably integrate an external industry-standard Ethernet PHY with an internal processor

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, LatticeSC/M, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

Data Communication, Ethernet, Defense, Automotive, APB, AXI, AXI-Lite Interface, AHB, Ethernet Bundle 

Reference Design

Generic Soft SPI Master Controller Reference Design

Provides an interface between a generic processor with parallel bus interface and external SPI devices.

MachXO2, MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 

SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 

Reference Design

Soft I2C Bus Master

Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3, Mach-NX 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 

Reference Design

Soft I2C Slave Peripheral

Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C