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  • Lattice Sentry I2C Filter IP Core

    IP Core

    Lattice Sentry I2C Filter IP Core

    SMBus relay with I2C filter and provides 4 interface to protect malicious traffic.
    Lattice Sentry I2C Filter IP Core
  • Lattice Sentry PLD Interface IP Core

    IP Core

    Lattice Sentry PLD Interface IP Core

    Lattice Semiconductor Customer Programmable Logic Devices (PLD)implements a bidirectional mailbox for sending and receiving messages.
    Lattice Sentry PLD Interface IP Core
  • Lattice Sentry SMBus Mailbox IP Core

    IP Core

    Lattice Sentry SMBus Mailbox IP Core

    SMBus, a two-wire interface that support fairness arbitration and compatible with AHB-Lite specification. Target devices are Mach-NX and MachXO3D.
    Lattice Sentry SMBus Mailbox IP Core
  • PIC IP Core

    IP Core

    PIC IP Core

    Lattice Semiconductor PIC soft IP with configurable 1~8 interrupt inputs and 32-bit AHB-L interface for Mach-NX FPGA
    PIC IP Core
  • SFB Interface IP Core

    IP Core

    SFB Interface IP Core

    SFB allow access to AHB-L CPLD block , management CPU recovery circuit and Flash sector for read/write.
    SFB Interface IP Core
  • Lattice Sentry Root of Trust Reference Design for Mach-NX

    Reference Design

    Lattice Sentry Root of Trust Reference Design for Mach-NX

    This design utilizes Platform Firmware Resiliency System Root of Trust to help develop and test a complete NIST 800-193 compliant security system that protects, detects, and recovers.
    Lattice Sentry Root of Trust Reference Design for Mach-NX
  • Tektagon™ XFR Platform Root of Trust Hardware Security Solution

    IP Core

    Tektagon™ XFR Platform Root of Trust Hardware Security Solution

    Tektagon XFR - an integrated Platform Root of Trust solution using Lattice Sentry, with low-power secure control FPGAs running pre-verified, PFR-compliant IP.
    Tektagon™ XFR Platform Root of Trust Hardware Security Solution
  • AHB-Lite Interconnect Module

    IP Core

    AHB-Lite Interconnect Module

    Propel IP Module: Fully parameterized interconnect for AHB-Lite systems - bus widths of 8 to 1024 bits, address widths up to 32 bits, 32 masters and 32 slaves.
    AHB-Lite Interconnect Module
  • AHB-Lite to APB Bridge Module

    IP Core

    AHB-Lite to APB Bridge Module

    Propel IP Module: Bridges high-speed AHB-lite to low-power APB. Data bus widths up to 32 bits. Address width up to 32 bits.
    AHB-Lite to APB Bridge Module
  • APB Interconnect Module

    IP Core

    APB Interconnect Module

    Propel IP Module: Fully parameterized to connect up to 32 APB bus masters and 32 slaves. Data bus width up to 32 bits. Address width up to 32 bits.
    APB Interconnect Module
  • Soft I2C Bus Master

    Reference Design

    Soft I2C Bus Master

    Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families
    Soft I2C Bus Master
  • System Memory Module

    IP Core

    System Memory Module

    Propel IP Module: Configures Embedded Block RAMs or Distributed Memory interfaces and connects to the AHB-Lite bus.
    System Memory Module
  • UART IP Core

    IP Core

    UART IP Core

    Propel IP Module: Similar to NS16450 UART for serial communication supporting RS-232.
    UART IP Core
  • GPIO IP Core

    IP Core

    GPIO IP Core

    Detects and controls GPIOs via Lattice Memory Mapped Interface (LMMI) or Advanced Peripheral Bus Interface (APB).
    GPIO IP Core
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